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DS90UB954-Q1: Clock data for Pattern Generation

Part Number: DS90UB954-Q1

Hi

I am using the 954 connected to a the MIPI CSI2 to USB driver CX3 from Cypress. Before connecting my whole system I want to test it with the pattern generation function from the 954. The config tool from the CX3 asks me about the PLL Clock the PCLK Clock  and the CSI RX LP to HS Clock. How can I know this information? Thank you! 

Regards

Natalia

  • Hello,
    The PLL Clock and LP to HS clock are not parameters we control in the 954 and may be specific settings related to the CX3. The PCLK can be calculated based on total vertical lines per frame* total horizontal lines per frame* frames/second.
    In the pattern generator of the 954 corresponding values are entered in PGEN_TOT_LPF, number total lines per frame and PGEN_LSIZE which is the video line size in bytes. Please reference section 7.5.11 in the DS90UB954-Q1 datasheet for more details on the Pattern Generator function.
  • Ok thank you! what about the FPS how do I get that parameter from the values on the register?
  • Hi Yuly,

    The FPS is can be determined based on the line period (0x0a and 0x0b of page 0 indirect access registers) & total number of lines per frame (0x0c and 0x0d of page 0 indirect access registers). Keep in mind the line period is calculated in units of 10 ns, unless the CSI-2 mode is set to 400-Mb operation in which case the unit time dependency is 20 ns.

    FPS = 1/(line period x total number of lines)

    Regards,
    Zoe