Linux/DS90UR910-Q1: LOCK and PASS pins status details

Hi Ankit,

Your understanding of the functionality of the LOCK and PASS pins is correct. In order to help troubleshoot this issue, can you confirm that the serializer in the external video source is transmitting FPD-Link II signals? Please refer to page 14 of the datasheet for a list of compatible serializers to use with the DS90UR910-Q1.

Regards,
Ryan

Hi Ryan,

Thank you for reply and suggestion.

Our FPD-Link II to CSI-2 Converter chip is: "UR910QSQ"
We are using serializer chip: "UR905QSQ"


-Ankit.

Hi Ryan,

Here few more questions.

How DS90UR910 reflects  following Serial Bus Control Registers ?

1. CSI_UNH1
2. CSI_UNH2
3. CSI_UNH3
4. CSI_UNH4
5. CSI_UNH5
6. CSI_UNH6
7. CSI_UNH7
8. CSI_UNH8
9. CSI_UNH9

Does DS90UR910-Q1 automatically write those registers, based on incoming RIN+/- signals ?

Or do we required to configure above registers based on our input resolution (to the RIN+/-) ??

Please reply.

-Ankit.

Ankit,
these registers are refreshed automatically, you don't need configure them.

best regards,
Steven

Hi Steven,

Thank you for reply..

So, when DS90UR910-Q1 writes those registers ?
And is there any relation with LOCK/PASS status pins and above registers?




-Ankit.

Hi Steven/Ryan,

Can you provide us response for above queries ?

-Ankit. 

Ankit,
after power on, UR910 would load the timing setting automatically. also it does not matter with the LOCK/PASS as LOCK/PASS is used to detect FPD-Link receiver link NOT CSI port.

best regards,
Steven

Hi Steven,

Thank you for response.

>>after power on, UR910 would load the timing setting automatically.

I Understand.

For e.g:

1. We are feeding continuous video of 800x480 @ 60 fps RGB24 resolution data to DS90UR905 serializer.
2. Serializer's output RIN+/- connected to DS90UR910.

Question is:

1. When this input signals' resolution (800x480) reflected in CSI_UNH1-9 ?
2. Should LOCK pin must remain high till DS90UR910 receives input signals on RIN+/- pins ?

-Ankit.

Hi Steven/Ryan,

Can you provide us response for above queries ?

-Ankit.

Hi Patel,
please see below feedback:
1.When this input signals' resolution (800x480) reflected in CSI_UNH1-9 ?
yes. if the timing is changed, register would be changed. do you have issues on it?

2.Should LOCK pin must remain high till DS90UR910 receives input signals on RIN+/- pins ?
NOT, LOCK is output for UR910. once it is locked, the lock output is high.


best regards,
Steven

Hi Steven,

Thank you for response.

>>yes. if the timing is changed, register would be changed. do you have issues on it? 

[Ankit] I Just want to confirm that when UR910 updates the CSI_UNH1-9 registers.

>>LOCK is output for UR910. once it is locked, the lock output is high.

[Ankit] So, my understanding is right, it will remains high un till any changes in RIN+/-., Correct ?

So, sequence of UR910 to decode RIN+/- signals are like this:

1. Decode RIN+/- signals and identify resolutions and timings. Once it identify UR910 will update CSI_UNH1-9 registers.

2. Then UR910 lock the RIN+/- signals & give output 'high' on LOCK pin.

3. Gives MIPI data and CLK on output MIPI interface.

Is this correct ?

-Ankit.

-Ankit.

Yes, Ankit.
item1 and item2 can work in parallel. thanks.

best regards,
Steven

hi Steven,

Thank you for the reply. Now i understand the concept.

Thank you.

-Ankit.