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SN65LV1224B: Frequency tolerance of REFCLK

K.Hamamoto
Guru 12155 points
Part Number: SN65LV1224B

Hi

There is specification of REFCLK as the following on the datasheet.

Does this mean the RECLK should be less than TCLK +/-100ppm ?

Our customer are going to replace from DS92LV1212A to SN65LV1224B because of EOL.

However it does not work as expected.(means it does not synchronize with serializer)

Could you give us any advice for this?

Best Regards,

Koji Hamamoto

  • 0
    TI__Genius 10250 points
    Hello Hamamoto-san,

    Both serializer TCLK and deserializer REFCLK need to be within +/-100 ppm of the desired transmission clock frequency. Which serializer is used?

    Regards,
    Yaser
  • 0 in reply to Yaser Ibrahim
    Guru 12155 points

    Hi Yaser-san,

    Thank you for your support.

    The sensor is MT9V032C12STM. (the configuration with DS92LV1212A is shown at the datasheet as bellow.)

    So, the REFCLK have to be below +50ppm if the TCLK tolerance of serializer is -50ppm. Is that correct?

    Best Regards,

    Koji Hamamoto

  • 0 in reply to K.Hamamoto
    TI__Genius 10250 points
    Hello Hamamoto-san,

    Even if TCLK tolerance is 50 ppm, deserializer REFCLK only need to be 100 ppm of the desired transmission clock frequency.

    Regards,
    Yaser
  • 0 in reply to Yaser Ibrahim
    Guru 12155 points
    Hi Yaser-san,

    What is the desired transmission clock frequency?
    I would like to know the exactly what the tolerance is related to which the frequency.

    Best Regards,
    Koji Hamamoto
  • 0 in reply to K.Hamamoto
    TI__Genius 10250 points
    Hi Hamamoto-san,

    The transmission clock frequency is chosen by you between 16 to 40 MHz (for DS92LV1212A) or between 10 to 66 MHz (for SN65LV1224B).
    For example, in the figure you showed above the clock frequency is 26.6 MHz. The accuracy of the 26.6 MHz clock on the sensor need to be +/-100ppm, and accuracy of the 26.6MHz clock on the deserializer (SN65LV1224B or DS92LV1212A) needs to be +/-100ppm.

    Regarding switching from DS92LV1212A to SN65LV1224B, below are some of the differences to watch for:
    - SN65LV1224B has on-chip failsafe input biasing, DS92LV1212A doesn't.
    - SN65LV1224B consumes more current due to the on-chip failsafe input biasing.
    - Switching parameters such delay and transition times are different, please see Switching Char tables in 2 datasheets.

    Regards,
    Yaser
  • 0 in reply to Yaser Ibrahim
    Guru 12155 points

    Hi Yaser-san,

    Thank you for your support.

    I understood. However there is no specification between TCLK and REFCLK. Because on the datasheet of DS92LV1212A there is a specification for REFCLK is related with TCLK. ( Does the tRCP mean to TCLK?)

    On the other hand,I found related post of this issue.
    It is mentioned as the REFCLK should be within +1% of TCLK. Also REFCLK should be +/-100ppm of desired frequnecy.

    https://e2e.ti.com/support/interface/high_speed_interface/f/138/t/355924?tisearch=e2e-quicksearch&keymatch=LVDS

    This issue is just like the above post. The customer use with TCLK=26.6MHz and REFCLK=27MHz. And the data synchronization has been failed between MT9V032C12STM and SN65LV1224.
    So that I suspected there is some relation between REFCLK and TCLK. However there is no specification on datasheet of SN65LV1224.

    Is there any specfication between REFCLK and TCLK? Should REFCLK be within +1% of TCLK same as the above link?

    Best Regards,

    Koji Hamamoto

  • 0 in reply to K.Hamamoto
    TI__Genius 10250 points
    Hi Hamamoto-san,

    The REFCLK frequency needs to be the same as TCLK frequency. As in the example you referred to earlier, TCLK is 26.6MHz and REFCLK is 26.6MHz. The accuracy of each of TCLK and REFCLK needs to be +/-100ppm. If that is the case, then REFCLK frequency would be within < 1% of TCLK frequency.

    Regards,
    Yaser