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DS90UB954-Q1: Clock mode mismatch between 954 and 953

Part Number: DS90UB954-Q1
Other Parts Discussed in Thread: ALP

Hi team,

I have two questions.

#1

I would like to connect 953 and 954 originally in different hardware setting of clocking mode.

I will rewrite register of 953 through 954, but the back channel frequency is different depending on the initial value read by strap.

Does the back channel establish between SERDES different clocking mode?

#2

If 953 registers can be rewritten on back channel from 954, external clock input to CLKIN pin of 953.

Is it OK if the clock is externally input to 953 set to synchronous mode?

Best regards,

Tomoaki Yoshida

  • Hello,

    1. If the BC Frequency between the boards are different based on the values of the strap mode, you can modify them by changing the value in the registers.
    If you read section 7.5.1.1 on BCC, you'll see that the BC_FREQ_SEL will establish the back channel frequency between the 954/953.
    2. You can program the 953 from the 954 using remote registers.
    In the 953 data sheet, using an external clock is usually for non-synchronous clk input. I would try to set up the SERDES pair in synchronous mode using the internal oscillator for now.

    What do you mean by establishing SERDES in different clocking mode?
  • Hi Sally-san,

    Thank you for your support.

    I think that it will be used BC communication when it program the 953 from the 954 using remote registers.

    Is it possible to use BC between boards with different BC frequency setting?

    For example, we are thinking of connecting 954 set to synchronous mode to the board which 953 is set as Non-synchronous clock mode and receives an external clock on the board.

    >What do you mean by establishing SERDES in different clocking mode?

    I want to know whether back channel communication is established in order to set registers of 953 from 954.

    Best regards,

    Tomoaki Yoshida

  • Hi Yoshida-san,

    It is not possible to use different BC frequency settings between boards and they should be set to the same modes.
    The BCC is deafulted to connect the SERDES pair, but you can change the some of the settings in the BCC_CONFIG (0x58) register if you'd like. Please refer to section 7.6.80 in the DS90UB954 datasheet.

    -Sally
  • Hi Sally-san,

    Thank you for your reply.
    When connecting boards with different mode setting and BC frequency setting, change 953 register via 954 to correspond.
    Is the function preserved even if the clock is input to CLKIN of 953 set to Synchronous mode?
    I do not mind the characteristics such as noise.
    I want to know if there is an influence on 953-954 FC, BC communication.

    Best regards,
    Tomoaki Yoshida
  • Hi Yoshida-san, 

    The function will not be preserved if the SERDES pair are not both either set to synchronous or asynchronous mode. 

    Thanks, 
    Sally 

  • Hi Sally-san,

    Thank you for your support.

    If the SERDES pair are set to synchronous mode and clock inputs to CLKIN of serializer, does they keep the FC and BC communications?

    Is there no influence such as communication being interrupted by inputting the clock?

    Best regards,

    Tomoaki Yoshida

  • Hi Yoshida-san, 

    If both modes are set to synchronous mode (default status) the FC and BC communication should already be set. Just check to make sure you have lock status on the EVM or on the ALP GUI. The clkin of the serializer is used for the asynchronous mode. Please refer to section 7.4.1 on the DS90UB953 data sheet for the different clocking modes. If you try to set the modes to synchronous and apply a clkin signal, the communication will likely have problems. 

    Thanks, 
    Sally 

  • Hi Sally-san,

    Thank you for your support.
    I understand this matter.

    Best regards,
    Tomoaki Yoshida