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DS90UB949-Q1EVM: CRC errors increasing on evaluation boards with good wiring

Part Number: DS90UB949-Q1EVM
Other Parts Discussed in Thread: DS90UB948-Q1EVM

Hello,

I am using the following evaluation boards:

  • DS90UB949-Q1EVM
  • DS90UB948-Q1EVM

They are connected by 4 coaxial cables (2 on PORT0 and 2 on PORT1) (each one is 15cm long).

Connection is correctly made between the serializer and the deserializer. I can access their registers using the software Analog LaunchPAD.

But I observe that the CRC Errors counter (register 0x0A-0x0B in the serializer) is constantly increasing (about 4 errors per minute). I do not understand these errors as my set-up is supposed to be very clean, I would say in nominal conditions. Is there a known reason for this phenomenon ?

As I would like to check the connection between the serializer and the deserializer with a far worse link than those 4 coaxial cables, I would like to understand this issue first.

Additional information:

I tested the connection using the BIST mode. I do not have any error on the forward channel (0 on both PORT0 and PORT1 in the deserializer registers). But I still have some errors on the back channel, in both CRC Errors counter (0x0A-0x0B) and BIST BC Error count (0x1B) in the serializer.

  • Hello,
    Is the LOCK signal stable high? What is the condition of PASS in the BIST mode?
    You can also test the link with the pattern generator.
    Please refer to the debug/diagnostics training module in the FPD-Link learning center at the link below.
  • Hello,

    Thank you for the link, this is a useful video.

    Here is what I can tell after more experiments:

    • In BIST mode: LOCK is stable high, PASS seams stable high (I could not catch any variation with a probe)
      When BIST is deactivated:
      • PASS is low (meaning some errors occured according to the documentation)
      • but in the meantime the register BIST ERROR COUNT (0x25 on Des) has a value of 0 on both PORT0 and PORT1.
      • and the register BIST BC Error Count (0x1B on Ser) is not null (about 5 errors, independently of the duration of the BIST mode)

    • With pattern generator: LOCK is stable high.
    • When BIST Mode or Pattern Generator stay active, the value of CRC Errors (0x0A on Ser) does not increase.
    • When BIST Mode or Pattern Generator are switching ON or OFF, the value of CRC Errors (0x0A on Ser) increases of approximately 4 errors.

    When I said (in my previous post) that CRC errors were constantly increasing, it was actually because I was switching the BIST mode ON and OFF every 10 seconds.

    I hope this can help to understand my situation.

    Thank you.

  • Hi Romain,

    I would like to let you know that I am taking a look into this and will try to provide another response by tomorrow.

    Regards,
    Jonny
  • Romain,

    I believe the CRC errors you are seeing might be related to some AEQ settings being disrupted after switching BIST on and off. After running BIST and observing no errors, I would recommend power cycling the board and checking for lock, pass, parity errors, and CRC errors. You can also try using different length cables as well.

    Regards,
    Jonny
  • Thank you very much for your reply.

    I looked into AEQ registers, but I still miss the point why BIST switch would disrupt AEQ settings. Could you please explain what you mean by "AEQ settings being disrupted" ? And what is the link with CRC errors ?

    Also, by "power cycling the board", do you mean turning on and off the power of the board and check everything each time ?

    Sorry by asking a lot of questions, and thank you again for your help.

  • Romain,

    No worries. The AEQ settings being disrupted is just something that can possibly happen when you go out of BIST mode without a proper reset of the device.

    So once you get BIST running up ok without any errors, turn off and on the board power again and see if you have link, lock, pass, no errors etc. Even though you might be passing the BIST, it won't be able to catch everything that may not be ideal in your entire system design. After doing a power cycle after a successful operation of the BIST, I would recommend changing cable lengths, checking for any possible impedance mismatches, and manually setting the AEQ threshold based on the cable length.

    Regards,
    Jonny