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Related Posts

  • Forum Post: Re: Demo board for DS92LV16

    John Goldie
    Hello - Sorry for the holiday break delay. Unfortunately National only offered the one EVK for this part and it is no longer in stock. If you have the SER (DS92LV16) then you are correct, the DES function of the DS92LV16 is needed. Please email me direct at John.Goldie@ti.com I will try to locate...
    on Jan 3, 2012

  • Forum Post: Re: DS92LV16 Timing Clarifications

    John Goldie
    Greetings - This parameter is really defining the Data Valid before Clock (SET) and Data Valid after Clock (Hold) times for the DES output. Lets assume the clock is perfect in the middle of the data bit, and with ideal edges, the largest SET time would be 0.5 of the clock period. And likewise,...
    on Jan 17, 2012

  • Forum Post: Re: DS92LV16 Timing Clarifications

    John Goldie
    Greetings - Please note the DES output is really defining the DATA VALID BEFORE CLOCK EDGE and also DATA VALID AFTER CLOCK EDGE. We state a MIN and a TYP. The TYP is the one that matters as DATA WILL NOT CHANGE in this windown around the RISING clock edge. In your 26 MHz example, the clock period...
    on Feb 13, 2012

  • Forum Post: Re: SN65LV1224BDBR versus DS92LV1224TMSA

    John Goldie
    Greetings - The DS92LVxxxx parts historically were from National Semiconductor which is now part of TI. The two devices you noted are indeed pin compatible and are the same function. Both are in full production and BOTH are available. There are some small differences to be aware of since both have...
    on Feb 20, 2012

  • Forum Post: Re: BLVDS03 eveluation board

    John Goldie
    Hello Phillip - Your information is correct, this was a demo board offered many years ago at National and has since been discontinued as the FPGA used on this board was obsoleted by the vendor also. We do not have any more to supply. Perhaps a community member has one they are willing to part with...
    on Mar 22, 2012

  • Forum Post: Re: SN65LV1023A Hold Time

    John Goldie
    Greetings - I agree with Max, it is not recommended to operate outside the datasheet specifications. If the system has SET time margin, then another possible solution would be to add a logic buffer to the data lines to delay them with respect to the clock, this would trade off SET time for additional...
    on Apr 20, 2012

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