Part Number: TCA9617A
The TCA9617A/B internal circuitry and all I/Os are powered by the VCCBpin.
If VCCB pin was not powered, what are the A-side pins (SCLA and SDAA) state? H-impendence in 9617_Channel A internal? Or else?
In reply to Antony Lin:
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Please see below:
"Previously you mentioned it's unknown state. Does it mean it's floating? Or we can only say it's unknown so there're many possibilities?"
-This device was not intended for VccA to be larger than VccB. This is partially what I meant when I said the state is unknown: the POR did not initialize yet so it has not properly turned on, at the same time the A version of this device had issues with keeping the device high Z when turned off though I believe this was also associated with the logic on the enable pin (if properly turned on by powering B side then this would not be a problem).
Looking at this again, from the image above, the ESD cells turn on because VccA > VccB meaning there is a possible path for current to travel through this device (something I had missed until you started asking about leakage current).
Sorry for the confusion,
In reply to Bobby Nguyen:
Some more questions from customer boards here.
As shown below, they uses two TCA9617A with A-side signal connected together. As previously mentioned, they would have a scenario that P3V3_Stbyis supplied, but P3V3 is still 0V, and we understand that the leakage from A-side to B-side @ U3C1 could be expected behavior.
Due to leakage mentioned above, the hi-level voltage of SDA and SCL of the top TCA9617A is impacted by the bottom TCA9617A. Currently they see two different results regarding the I2C access through the top TCA9617A as below.
So, the questions from Quanta would be
"Does it mean the leakage is getting more serious when the leakage period (VCCB is not supplied) is longer and in the end hi-level voltage at SDA-A and SCL-A become lower?"
This sounds like the Vforward of the diode is changing slightly due to temperature because of the leakage current.
Diodes typically will have a lower forward conducting voltage as they heat up. Please refer to the graph below taken from https://na.industrial.panasonic.com/blog/photomos-input-circuits.
I suspect the leakage current will change slightly before the temperature stabilizes.
"Can we also say the impedance between A and B side are getting lower as well?"
Vf seems to be dropping which seems to imply if the leakage current is constant then the impedance is actually getting larger.
"In TCA9617A, the VIH is 0.7xVcc. Now Vcc is 3.3V with SDA_A/SCL-A level around 1.4V which is far below 0.7xVcc. Why I2C access is still workable"
Am I correct in the assumption that the top TCA9617A is the one you are referring to here? Can you provide scope shots of both working and failing cases?
Please see the waveform captured at A-side and B-side as below for the 1.4V case which they mentioned the I2C access is successful.
THere's something I need to correct as below about the waveforms provided yesterday.
What customer observed in this case is,the controller can still recognize FRU and TMP75 correctly. So, the questions includes,
P.S.: For another case with TCA9617A-1 B/left side voltage level around 1.3V, the controller is not able to recognize FRU and TMP75 correctly.
Customer did plan to replace TCA9617A by TCA9617B, but their end customer needs some explanation to what we see now.
Regarding the increasing or decreasing of leakage current that you mentioned, is there a way to know it should be the increasing case or decreasing case on customer board?
Please keep us posted regarding your investigation about VIH and VIL.
"Regarding the increasing or decreasing of leakage current that you mentioned, is there a way to know it should be the increasing case or decreasing case on customer board?"
the easiest way is to use a digital multimeter (ammeter) while the I2C lines are high and watch the current to see if it is getting larger or lower. You can do this on either SCL/SDA line.
"Please keep us posted regarding your investigation about VIH and VIL."
-Will do, I don't think the issue with my access to the UNIX servers will be resolved very quickly though. I have placed an order for the A version of this device to see if I can put it on a board and play with it in the lab. Hopefully this will give me an better Idea of what is going on during the "Leakage Current" event and ViL/ViH.
Regarding "increasing" or "decreasing" leakage current under such scenario, we're still not able to judge which case it shall be based on our chip design, right? Customer needs to measure this on their board at this moment, correct?
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