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PCA9546A: Power-On Reset Errata (May 2016)

Part Number: PCA9546A

10.1 Power-On Reset Errata : System Impact: If ramp conditions are outside timing allowances above, POR condition can be missed, causing the device to lock up. Trise is specified <10ms,

PCA9546A Vpor is 1.6 typ, 2.1 Max.

My customer has a Backplane 3.3V Rise time of:  0V to 2.2V (800us) then plateaus at 4ms then slowly rises to 3.3V 32ms later.

3% of the time, my module does not boot successfully. We've narrowed down the problem to a Tundra TSI78 SRIO switch not finishing it's I2C eeprom configuration load sequence.

The TSI578 shares an I2C bus with the PCA9546A which was used early on in the development process to program 3 devices on the backside of the switch: Ports A, B, C  each has a 10K pullup. Port D is not used and the pins are left floating. (not ideal, but we never enable port D ((on purpose))

These 3 backside devices are now preprogrammed and I2C programming is no longer required.  (I could depopulate the PCA9546A and have no adverse module operation reaction).

The RESET_N pin is tied to VCC thru a 5K resistor. There is no active signal driving the RESET_N input.

I cannot duplicate the customer failure in my Lab, >1000's of power cycles.

Question: what is meant by the System Impact statement term 'LOCK UP'? does it mean the device won't respond to I2C transactions s directed at it? (in this case I don't care because I don't communicate with this device any more) or does it mean it will potentially back drive the primary SCLOCK/SDATA bus interfering with my critical TSI578 to EEPROM configuration transactions?