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PCA9546A: Asking fro the PCA9546 setting and the leakage questiosn

SHH
Mastermind 30251 points
Part Number: PCA9546A

Hi team,

Could you please help for the quesitons?
1. Are they ok to pull SDA/SCL to 3.3V and SD0/SD1 pull high to 5V?
2. cusotmer's sclar uses PCA9546 to read/write the DDC EEPROM. If the PCA9546 did not has VCC powerand the SD0/SC0 was pulled high to 5V for external PC read DDC EEPROM, will SDA/SCL has the leakage voltage from SD0/SC0 5V?
3. If Channel 0~3 are set as disable, will that have the impact on DDC EEPROM read/write by external PC?

Here is the block diagram

Thanks,

SHH

  • 0
    TI__Guru 62910 points
    Hi SHH,

    Today is a holiday in the US, but we will take a look at your question once everyone is back in the office tomorrow.

    Max
  • 0
    TI__Genius 17205 points

    Hello SHH,

    1.  Yes, this is designed to work for this application.  Vcc of PCA9546A should be put at 3.3V to work properly.  This is covered in the Datasheet in the application section.  

    2.  This is a pass fet architecture and therefore when the part is unpowered it will have the pass fets off and now leakage current from 5V to 3.3V voltage rails.   

    3.  If channel is off, then it is high z.  No affect to DDC EEPROM.  

    -Francis Houde