TCA9617B: VOLB spec

Hello David,

There is lots of documentation about this.  It is covered in the datasheet and in many posts in E2E.  Did you get a chance to do a search in E2E? 

I have attached some of the E2E links based on a quick search for VOL on the B side. 

e2e.ti.com/.../2014638 tca9517#2014638

I will summarize why there is a "static voltage offset".

First, I want to let you know that the SCL and SDA have identical circuitry. 

Second, I want you to note that this is a bidirectional protocol, where the low can be generated by either the Master or the Slave.

Lets take an example. 

• Master pulls low on A side, which means anything less than 0.3V * Vcc, which the TCA9617B will see as a low.
• This LOW then makes the TCA9617B produces a static offset voltage on the B side, at 0.5V.
• To the slave this 0.5V is less than 0.3*Vcc, so it is considered a LOW to the slave device. 

• Now lets assume the Slave want to give an ACK to the Master to let it know it received the commands.  The slave will turn on it's pull down fet and bypass the Static Voltage Offset and pull the voltage below 0.4V, which to the TCA9617B means the B side is LOW and will send a LOW to the A side (the master). 
• If you don't have this static voltage offset then you couldn't tell which side was pulling low.  You need to have two discrete voltage levels on the B side so the TCA9617B knows where the low is coming from (Is it the Master or is it the Slave). 

You might ask, why does the SCL need to have this feature.  Generally speaking the SCL is created by the Master.  That is not always true.  If the Slave does clock stretching then it needs to be able to pull the SCL low.  Therefore that circuitry is needed there too.  Also, if you have a multi-master I2C tree it would be needed there too. 

I hope that helps.  Let me know if it is still confusing.

-Francis Houde