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TCA9406: Layout and Electrical Specs issue

Mihir Gupta65
Intellectual 2155 points
Part Number: TCA9406

Team,

I have a customer who is asking for a layout example for the TCA9406. Since the part has an unusual pinout (SDA_A & SDA_B are on the same side), the Figure 8 Layout Example in the datasheet is wrong. This seems to have been brought up in another e2e thread as well:  

About the Electrical Characteristics:

Min VOHA is specified as only "VCCA*0,67". This is not valid high-level. Usually VOH of a logic IC is 90% VCC. How can this IC be used for driving I2C input which expects minimum of 70% or 80% VCC? On the basis of the circuit description I would expect that the 10k resistors should pull output to VCCA-(10kR*20uA)=VCCA-0.2V. Could you please explain this?

The 10k resistors and One Shot Accelerators are missing in the datasheet specs. No min/max resistance/current values are given.

Thanks and Regards,

Mihir Gupta

FAE - South Germany

  • 0
    TI__Genius 17205 points
    Hello Mihir,
    We have it recorded in our backlog of datasheet corrections. Thanks for bringing it up to our attention again.

    I not sure I quite understand how you got Vcca-(10kR*20uA=Vcca-0.2V??? This is an open drain architecture and the high is achieved by the pull up. The one shot is only turned on for a short period of time during the transition, then turns off. The idea is that it has a low impedance to Vcc for a short period of time to charge up the capacitance then turns off and the pull up resistor keeps the bus to Vcc until either the slave or master pull down on it. VOH for I2C is not 90% vcc. I am not sure what your question is here. Can you explain in a bit more detail.
    -Francis Houde
  • 0 in reply to fhoude
    TI__Intellectual 2155 points
    Hello Francis,

    Firstly thank you for your response and I would like to apologize for getting back to you so late.

    To clarify the first question: The voltage drop across the 10k would be 10kOhm*20uA, where I_OH is -20uA, as specified in the datasheet. This comes out to 0.2V, so the maximum voltage on the bus could be Vcc - 0.2V. Or am I thinking about this wrong? What would happen if the downstream I2C device expects an VIN_High I2C voltage of 0.7*Vcc? Would this cause problems with the translation?

    Regarding the 10k resistors: The part that concerns the customer the most is the max cap load that the I2C bus can tolerate. Since the pull up resistor will create an RC filter together with the cap load, it is possible that it will affect the speed of the rising / falling edges of the transmission. This is why the customer would like to know what the tolerance of the internal 10k is, so that they can calculate the max permissible cap load.

    Regards,
    Mihir
  • 0 in reply to Mihir Gupta65
    TI__Genius 17205 points

    Hello Mihir,

    Here is the link to the applications note that specified exactly how to select the pull up resistor based on bus capacitance.  

    Yes, of course the RC time constant will affect rise times.  That is inherent in an open drain architecture.  You need to measure or estimate the capacitance on the bus in order to correctly select the pull up resistance and you also need to know the pull down strength of the master and slave in order to insure you don't violate the VOL/VIL requirements.  Thus there is am min and max pull up resistance and the app note covers how to calculate them.

    -Francis Houde

  • 0 in reply to fhoude
    TI__Genius 17205 points
    Sorry, missed one question. The tolerance on internal pull up resistors is on the order of ~+/-20%.
    -Francis Houde