If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

• TI Thinks Resolved

# TCA9548A: Can use 3.3V and 1.8V at same time?

Part Number: TCA9548A

Dear Team,

Could I pull up two different voltage on different I2C bus at the same time?

For example, use 3.3V on SC0 and use 1.8V on SC1.

Can we use 2.5V as Vcc or use 1.8V Vcc?

• Hey Seasat,

Our I2C switches do support this voltage translation feature however the correct Vcc must be used otherwise the I2C switch will not isolate the voltages when channels are enabled. The only requirement is for Vcc to be low enough to support this, as the Vcc voltage is the gate reference voltage for our FETs.

---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

If the FET is enabled and the Drain/Source (SDAchx/SCLchx) is lower than the gate voltage - Vth then the FET could begin conducting when it is not supposed to.

Ex. Lets say the main SDA/SCL bus is pulled up to 3.3V and Ch1 is enabled which uses a pull up of 1.8V. Lets say Vth is 0.7V and Vcc of the I2C switch is also 3.3V. This means with Ch1 enabled and is lower than 2.6V (Vcc-0.7V) therefore the drain to source impedance is now lower than the ideal (ideally should be infinite). This will form a resistor divider between the two different pull up values and if those two resistors are the same value, then the voltage on both SCL/SDA lines will likely be the mid point of these two pull up values. This will be the voltage when the lines are idle.

Simulation above as it may be easier to understand from a picture.

-----------------------------------------------------------------------------------------------------------

This means Vcc should be properly chosen for this device. To figure out the correct value, you can use figure 14 on page 22. Simply figure out the lowest pull up value on your channels (main SDA/SCL included). In your case, this seems to be 1.8V on ch 1. We will now call this the passfet voltage denoted as Vpass.

You can see now, the max value you are allowed to have for 1.8V to work is a Vcc of 3V. To leave margin for error I would choose 2.5V. 1.8V will work as well but will slow down the fall times and increase propagation delays a little (though I doubt it will affect signal integrity).

Lastly a simulation to see the voltage translation working. (I changed the Vth of the FET to be 1.2V as that is what it looks like it is in the graph)

--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

To summarize, all the channels and main SDA/SCL can be different voltages but as long as Vcc is within an accept range defined by figure 14 of the datasheet. In your case, the values you've selected will work.

I hope this is clear,

-Bobby

EDIT:

Please note the pull up voltage on the main channels need to meet the minimum ViH of Vcc in order for correct operation of the device. You may need to double check this when a lower pull up voltage is on main channel and a higher Vcc is used.

• In reply to Bobby Nguyen:

HI  Bobby

Thanks a lot.