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P82B96: How to isolate Sx and Sy of two P82B96

Part Number: P82B96
Other Parts Discussed in Thread: TXS0102, PCA9515A, TCA9517A

Dear Technical Support Team,

I have two questions about P82B96.

I consider two cases for my connection.

Q1.)

I'd like to use two P82B96, but datasheet shows below.

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Two or more Sx or Sy I/Os must not be connected to each other on the same node.

The P82B96 design does not support this configuration.

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Do you have any workaround?

My idea is to isolate them with other I2C device(PCA9515A , TXS0102 etc).

If you have any better I2C devices or ideas, please let me know. 

Q2.)

On the other hand, datasheet shows following description on page13. 

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There are no restrictions on the interconnection of the Tx/Rx and Ty/Ry I/O pins to other P82B96s,

for example in a star or multi-point configuration (multiple P82B96 devices share the same Tx/Rx and Ty/Ry nodes)

with the Tx/Rx and Ty/Ry I/O pins on the common bus, and the Sx/Sy side connected to the line-card slave devices.

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According to this , is my following figure correct?

If you have any concern, could you share it?

Best Regards,

ttd

  • Hey ttd,

    A1) This set up may work but are okay with the possibility some lows from one slave (slave on remote board 2) being unseen by the other (slave on remote board 1)? For my walk through example I'll use the TCA9517A where the buffered offset set (B) is facing the master and side A is facing the Sx/Sy of the P82B96.

    Situation 1:

    Master pulls low; as long as master's VoL is below 0.45V B side will see low (This means the parallel P82B96 will also see a low as it's ViL is 0.6V minimum). A side of TCA9517A will have a VoL of 0.1V which is lower than the ViL of the series P82B96 at 0.6V minimum. This means the low will propagate to the slave on the remote boards.

    Note: VoL of the master is dependent on the pull up resistor so if the VoL is not low enough you can increase the value of the pull up resistor assuming the capacitance isn't too large (4 slave devices plus 2 buffers should amount to around 60~90pF so you should have room to increase the resistor)

    Situation 2:

    The slave on remote board 1 pulls low; zero will be seen on P82B96 if VoL is lower than 0.6V. This propagates to the other P82B96 and if VoL is lower than TCA9517A A side's Vccx0.3V then B side will pull low to 0.52V which should be seen by the master and also pull the other P82B96 low to propagate a zero to remote board 2.

    Note: TCA9517A will propagate the low if VccA is larger than 2.64V though I recommend something a bit higher to leave room for margin.

    Situation 3:

    Remote board 2 pulls low; this is where the problem occurs.... When the low reaches the main board where the master is, VoL is 0.88V which is NOT lower than ViL of TCA9517A. This means remote board 1 will not see a low but the master should see the low.

    This means slave 1 is blind to slave 2 ACKing and any data sent from slave 2.

    Note: Situation 3 assumes ViLc of 0.45 and not the standard ViL of Vccx0.3 we see in I2C. We are assuming slave 1 may have pulled low and then slave 2 or master decided to pull low as well (contention). This comparison value is used instead of the standard value in case of a contention but if contention does not occur then you could use the Vccx03 value which 0.88V could be lower than....

    From this above, it is possible to propagate the low in situation 3 assuming contention does not occur though to be safe I would want to use the Vilc of 0.45V. My thoughts is it should work but to be safe I would still assume the Vilc value because of uncertain situations.

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    A2)

    From my understanding of this part, this should be completely acceptable though I expect there are disadvantages here. I'll trim down the verbal explanation with pictures instead.

    From above, if master pulls low then the other two should also see lows because Tx/Ty in the normal situation should pull lower than Vcc(P82B96)x0.42.... By placing a parallel P82B96 set up like above this should not change.

    When a slave pulls low the master and other slave should see low as well assuming ViL conditions are met.

    The only disadvantage of this is the bus capacitance of the lines between the T/R lines are now shared between more cables. This device buffers a maximum of 4000pF so as long as the total parasitic capacitance of the lines remain below the 4000pF values you should be fine. With more cables, more parasitic capacitance will build up and the maximum distance for board is limited.

    Example: if you had the normal set up lets assume the maximum distance of cable is now 50m (4000pF worth of cable). With an extra board and P82B96 and assuming you want the cables to be equal distances, you now have a maximum of 50m between two set ups or 25m each. As long as the ratio remains the same, you could have 40m on one set up and 10m on the other.

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    To summarize, set up 2 would be more likely to work out but I do believe set up 1 could work if no contentions occurred on the bus. I would recommend set up 2 versus 1 unless maximum cable distance is a major concern.

    Thanks,

    -Bobby

    BTW, May I ask what application/end equipment this device is being used for? Also how long of a distance are you expecting from the cables? This is a device we don't see picked much because I2C is typically seen as an on board solution and not a cable solution; I'd be very interested in knowing when our customers decide to choose this device.

  • Hi Bobby Nguyen,

    Thank you for your prompt and gracious response.
    Our customer uses set up 2 based on your answer.
    I don't know their application and each cable length is 0.5m.
    So it is enough margin for P82B96 to drive it.

    Best Regards,
    ttd