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Original question:

TCA9406: How to calculate max capacitance

TCA9406: How to calculate max capacitance

Carolus Andrews
Mastermind 18780 points
Part Number: TCA9406

Team,

We were able to capture some interesting waveforms, see attached.

 

I would like to draw your attention to the tabs “compare” and “zoom”. They show the communication between the SMBUS charger and the SMBUS smart battery. I am holding the host microcontroller in reset so that it doesn’t transmit anything. The “NO HOST” waveform indicates that I have removed the host and the TCA9406 from the bus. The “STM32_RESET” indicates that I have connected the TCA9406 to the bus but I am holding the host in reset. What you can see is that there are several bytes transmitted in “NO HOST” but only one byte transmitted in “STM32_RESET”. Upon closer inspection, there is no ACK bit in “STM32_RESET”. The ACK bit is shown in the “zoom” tab.

 

If I understand this right, the one shot edge accelerator circuit in the TCA9406 reduces the rise time of the data by an order of magnitude.  I am not quite understanding why the slave device is not able to drive the data line low.

 

Could I get your thoughts?

SMBUS_waveforms_PMM240.xlsx

 

  • 0
    TI__Mastermind 49040 points
    Hey Carolus,

    Can you provide a block diagram of how everything is connected with our TCA9406? (Your description is a little bit hard for me to follow what is going on with the nohost and reset naming convention) Particualrly the zoom tab has be confused as what data_RST are clock RST are and why they are relavent to the clk data lines. Are these side 1 and side 2 of the SCL/SDA lines of TCA9406?

    Also can you show us scope shots (on both sides of the device)? I want to confirm that both sides are seeing the same signals.

    "If I understand this right, the one shot edge accelerator circuit in the TCA9406 reduces the rise time of the data by an order of magnitude. "
    -You are correct.

    Just looking at the comparison tab, the first bytes of both waveform seem to be sending the same address and write bit however the bottom one does not give an ACK.
    Is there any I2C/SMBus buffers on the bus connected to TCA9406?

    Thanks,
    -Bobby
  • 0 in reply to BOBBY
    TI__Mastermind 18780 points

    Bobby,

    Thanks for the reply. I have asked the customer to share a schematic of the system surrounding the TCA9406,  but I may need to share this offline. I have also asked them to clarify their naming convention here.

    In the meantime, they've made some progress on their own:

    As you can see on the attached scope capture, I am getting unwanted spikes on my Data line that coincide with the Clock rising edges. This only occurs intermittently, which made this so hard to track down. Here is what I think is happening:

      1. Crosstalk (or other coupling) from the clock rising edge induces voltage change on the data line
      2. TCA9406 device detects rising edge and then the edge accelerator turns on a strong pull-up for a short amount of time.
      3. Strong pull-up turns off and the SMBUS device pulls the data line back down
      4. The spike causes the bit to be interpreted as the wrong logical value since it violates the hold time.
      5. In the case of SMBUS, this can cause NACK as I had observed before.

    I am able to mostly remove this issue in 2 ways:

      1. Insert series resistor on clock and data lines (100 ohms), and/or
      2. Remove TCA9406

     

    Any thoughts on this?

  • 0 in reply to Carolus Andrews
    TI__Mastermind 49040 points

    Hey Carolus,

    "have asked the customer to share a schematic of the system surrounding the TCA9406,  but I may need to share this offline."

    That's fine, you can send it to duynguyen@ti.com

    "As you can see on the attached scope capture,"

    -I don't see the scope shot unless you are referring to the original post.

    "I am able to mostly remove this issue in 2 ways:"

    -Using a dampening resistor is one way to handle this though 100 ohms is fairly large and can cause a larger shift in the VoL seen by the device looking for an input.

    -Another way to reduce cross talk is to add capacitance on the bus but I usually discourage this as we are limited on bus capacitance on our lines.

    ------------------------------------------------------------------------------------------------------------------------------------------

    May I ask why the TCA9406 was chosen for this design? I am wondering if we could give them a different solution (will likely require a new board due to lack of pin to pin compatible devices to the TCA9406).

    Thanks,

    -Bobby

  • 0 in reply to BOBBY
    TI__Mastermind 18780 points

    Bobby,

    Sorry for the delay here. The customer has communicated that they chose the TCA9406 mainly because they wanted to prevent powered SMBUS devices from unintentionally powering unpowered SMBUS devices (there are separate power supplies on the bus).

    I requested a schematic, but they have not shared that as of yet. However, we know their system is roughly:

    Host  --  TCA9406  -- TVS  -- connector – cable – connector -- Slave device

     There are 6.8k pullup resistors on the slave side.

     

    Finally, yes, the scope shots I was alluding to were the ones from the original post (the excel file).

     

     

  • 0 in reply to Carolus Andrews
    TI__Mastermind 49040 points
    Hey Carolus,

    A question on the NOHOST and STM32_RESET waveforms:
    What device is address 0x0B?
    Is that the device you are holding in reset?
    Does holding the Host in reset also disable this slave device (does the slave have an enable pin connected to the host)?

    Thanks,
    -Bobby