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Hi Joe,

Thank you for your answer. I'll check them.

BR,

_John_

please tell me or send me where the code for hardware flowcontrol configuration for ti16550 . Please let me know. and if avail tell me how to test flowcontrol (CTS/RTS) .

Hello Gopi,

We do not have specifc driver code for the UART devices. Enabling flow control requires you to set a value in the FIFO Control Register (FCR, address offset 0x02) for the trigger levels and then enable bit 5 (AFE) in the Modem Control Register (MCR, address offset 0x04). For example:

/* Comm Port 1 or A -- UART register set definition */
/* Base address is 0x300                            */
#define RBR_UART1      0x300  /*Receiver Buffer Register of chA */
#define THR_UART1      0x300  /*Transmitter Holding Register of chA */
#define IER_UART1      0x301  /*Interrupt Enable Register of chA */
#define IIR_UART1      0x302  /*Interrupt Identify Register of chA */
#define FCR_UART1      0x302  /*FIFO Control Register of chA */
#define LCR_UART1      0x303  /*Line Control Register of chA */
#define MCR_UART1      0x304  /*Modem Control Register of chA */
#define LSR_UART1      0x305  /*Line Status Register of chA */
#define MSR_UART1      0x306  /*Modem Status Register of chA*/
#define SPR_UART1      0x307  /*Scratch Pad Register of chA */
#define DLL_UART1      0x300  /*Divisor Latch LSB of chA */
#define DLM_UART1      0x301  /*Divisor Latch MSB of chA */
/* End Comm Port definition */

// Setup and Initialize the port
 /* Port 1 */
 outportb(LCR_UART1, 0x80);     // Enable divisor access 
 outportb(DLL_UART1, 0x0c);     // set the divisor
 outportb(DLM_UART1, 0x00)
 outportb(LCR_UART1, 0x03);     // Set 8,N,1 data  
 outportb(FCR_UART1, 0x87);     // Set trigger level = 8 bytes, clear & reset TX & RX
 outportb(IER_UART1, 0x0F);     // Enable all interrupts
 outportb(MCR_UART1, 0x20);     // Enable flow control, AFE is enabled by MCR[5]

I hope this helps.

Best Regards,

Joe

Yes,

But i am using AM3703 omap processor. I think this has 16550 compatible uart device. But as per the data sheet AFE bit is XON in AM3703 driver. I rellay confused.

If any thing procedure you have about hardware flowcontrol in AM3703 processor please share it with me.

Thanks,

-Gopi

Hello Gopi,

I want to be sure I correctly understand what you are asking for. In an earlier post you stated:

"please tell me or send me where the code for hardware flowcontrol configuration for ti16550 . Please let me know. and if avail tell me how to test flowcontrol (CTS/RTS) ."

Are you using the AM37x processor and the discrete TL16C550 UART device?

The steps I provided in my previous post were the correct steps to enable hardware flow control in the TL16C550D device.

I looked at page 2391, Section 19.5.1.2  "Hardware and Software Flow Control Configuration" in the AM/DM37x Multimedia Device Technical Reference Manual. This device has three industry standard 16C550 UART ports with options for Software or Hardware flow-control. The

If you are using the TL16C550 UART with the AM37x OMAP processor you will be limited to using hardware flow-control (/RTS & /CTS).  UART1 and UART2 ports on the AM37x have the /RTS and /CTS terminals that can be connected to /CTS and /RTS, respectively, on an external UART device.

If I have misunderstood your question please let me know.

Best Regards,

Joe