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sn65hvd3086e: Query about hot plugging behaviour in general across RS485 chips

Part Number: sn65hvd3086e


I am trying to implement a 4-wire RS485 without the need to interact with a microcontroller.  My circuit is 5V.  I am wanting to use 1/8th load devices and full duplex.  At present, I have 10k resistors on the enable lines either high or low for RE and DE such that I expect to power up and have the device send and receive.  I am not getting anything on RO.  My setup at present is just the two devices with a length of ethernet cable - about 10m I think.

I do get a 4Vpp differential signal at the receive terminating resistor.  I do have a pull-up resistor to 5V on the RO at both ends.

The datasheets for various RS485 chips all say something like, "As shown in the device FUNCTION TABLES, the ENABLE inputs have the feature of default disable on both the driver enable and receiver enable. This ensures that the device will neither drive the bus nor report data on the R pin until the associated controller actively drives the enable pins."

This is not at all clear in my opinion.  The function tables are not the place to convey information about startup conditions in my opinion.

I think the devices are in some sort of disabled condition and my question is, "What is the required startup sequence for this device?" but it is probably across a wide range of devices.

Do the enable pins need to be activated after power up in a particular sequence?  Is it possible to have both transmit and receive active at the same time?  (I would think so as it is supposed to be 'full duplex' after all...)

Perhaps I am looking at the wrong devices for my application?   Should I use something without enables?

Thanks in advance,


  • Hi Steve,

    There actually aren't any special start-up requirements for these devices and it sounds like what you intend to accomplish is fully in line with the expected usage of the part, so it isn't immediately clear why you are not seeing an output from the receiver. Just to rule a few simple things out right off the bat, could you please verify that the /RE pin is held low (sometimes people do not realize it is an inverse-logic enable) and that the pull-up resistor on RO is at least 1 kOhm (so that it is easily "overcome" by the device's output)? Does the output never activate or does it just take a while to start up after VCC ramps? What behavior do you see - stuck at 0 V, stuck at 5 V, etc.?

    To address some of your questions - yes, it is possible (and common) to have TX and RX active at the same time on a single transceiver. Hot plug support (or glitch free power-up) typically means that the outputs of the chip will be high impedance when VCC is too low to power the part and then will assume the correct state once fully powered (rather than driving an opposite logic state, becoming enabled when they are configured to be disabled, etc.).

    Best regards,
  • In reply to Max Robertson:

    Hi Max !

    Thanks for the reply.  Please understand my initial query was a generic question regarding the chips like the SN65HVD3086.  These devices have many analogues within TI and also with other manufacturers.

    I have 10k resistors soldered high and low on the DE and RE pins.  I have a 4k7 pull-up on RO.  I have played with various settings on the bias resistors.  They started out at 620 ohms each then went to 1k now are removed entirely.

    I should say there was a single time when I did get an amount of data through on one of the receives.  It was never the two receives.  This led me to believe it was a power-up issue rather than a biasing issue.  I have never removed either of the enable resistors throughout testing but have now removed and replaced the chips.

    Am now making schematic and pcb models for a different chip.  Am planning to try the SN65HVD51 which is an 8-pin SOIC without any enables.  Data should flow through the device unhindered.  It is also a smaller package which frees up some board space.

    My application is a new RS485 network with only my devices.  I do not need to worry about hot-plugging as mine is a fixed situation where all members on the network can be turned off if a new device is added or an old device needs replacing.

    I seem to always find the glitches!  I am also learning to use devices from reputable manufacturers who publish proper datasheets.  TI is my chosen source at this time even though startup curves are not in these datasheets.

    I'm not in the business of doing someone else's R&D I'm afraid so I'll just change chips and move on to the next glitch !

    Thanks again for your reply.  Much appreciated.


  • In reply to Steve McLevie:


    Thanks for the update, and let us know if you come across any issues to debug with HVD51. What you saw on the HVD3086 is strange - I think with some more probing we would have been able to better understand what was going on, but I certainly understand you not wanting to spend time debugging if another chip can get you up and running faster.


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