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TLK10002: clock switch between REFCLK0 and REFCLK1

Part Number: TLK10002

For TLK10002 normal operation, we need to first apply an external clock to TLK10002's REFCLK0 to let CDR working probably and produce a good recovered clock,

then connect the recovered clock to an external dejitter IC lmkxxxxx to generate a new, clean clock to TLK10002's REFCLK1 and switch TLK10002's working clock to this new clock.. 

Will the switch from REFCLK 0 to REFCLK 1 cause any unstable state or out of lock state for the CDR in TLK10002?  Thank.

  • Hi Jinsan,

    Could you clarify why are planning to switch the reference clock from REFCLK0 to REFCLK1? The recommended clock connection is mentioned in datasheet (Figure 39. An External Clock Jitter Cleaner Connection Example for Channel A). If a switching occurs in the REFCLK signal, the characteristics such as frequency, jitter, etc. should be meet the reference clock characteristics. As well, errors could be present while the device is locking (sync).

    Best Regards,
    Luis Omar Moran
    High Speed Interface
    SWAT Team
  • In reply to Luis Omar Moran:

    Thank. I got your point. I will use one of the dual loop clock IC lmkxxxxx with external VCXO to provide the clock to TLK10002.
    Have a nice holiday.

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