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TLK10232: REPCLK Input termination

Part Number: TLK10232

Hi team!

I have  connected  LVDS Clock to REPCLK pott of TLK10232 with AC cappling (0.1uF).

So i would like to confirm  the  circuit  of REPCLK Input termination in TLK10232 such as register value , V TERM and  capasitor. 

Is it same as  receiver of  CML termination as below?  

Regards,

Yoshihiro

  • Hello Yoshihiro-san,

    The REFCLK input accepts LVDS or PECL input clock. You shouldn't need to add anything aside from the AC coupling caps as the 100 Ohm termination is integrated into TLK10232. For more details, and an example of how to connect the clock signals, please see the EVM User's Guide which includes the schematics: www.ti.com/.../sllu180 .

    Regards,
    Yaser
  • In reply to Yaser Ibrahim:

    Yaser-san,

    According to TLK10232 data sheet, REFCLK0P/N is written as below,

    "Reference Clock Input Zero. This differential input is a clock signal used as a reference to channels A or B. The reference clock selection is done through MDIO. This input signal must be AC coupled."

    Also I think that C191,C197 is for accpple in the EVM schematics (page 24)
    So I placed AC cappling (0.1uF).

    Is it rignt or wrong?

    Regards,
    Yoshihiro Okabe
  • In reply to Yoshihiro Okabe:

    Yoshihiro-san,

    Yes; you do need AC coupling caps as I mentioned in my reply, but shouldn't need anything else. You can follow the EVM schematics. C193 and C195 are the AC coupling caps between clock source and TLK10232.

    Regards,
    Yaser
  • In reply to Yaser Ibrahim:

    Yaser-san,

     I understood. Thank you.

    By the way, Do you have any  schematics of REFCLK Input  structure  in TLK10232?  

    There is no schematics for it in datasheet.

    Regards,

    Yoshihiro

  • In reply to Yoshihiro Okabe:

    Hello Yoshihiro-san,

    Unfortunately, the input schematics is not available.

    Regards,
    Yaser

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