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Dominant timeout of SN65HVDA1040 A-Q1

Masami Michino
Genius 5070 points
Other Parts Discussed in Thread: SN65HVDA1040A-Q1

Dear, All

If 'Low' is inputted into TXD pin for a long time, dominant timeout will generate SN65HVDA1040 A-Q1.
In order to test a customer's system, a customer wants to output dominant to CAN Bus for a long time.
For this reason, there are the following questions.
- Is there how to stop a dominant timeout function?
- When a dominant timeout function can be stopped, I want you to teach the method.

Thanks, Masami M.

  • 0
    TI__Mastermind 21336 points

    Hi Masami-san,

    Unfortunately, there is no way to disable the Dominant State Timeout feature of the SN65HVDA1040A-Q1 device (or any of the dominant state timeouts in any of our devices).

    The best option I can think of is to send a very low duty cycle TXD waveform to the device. For example if you sent a 100KHz 1% duty cycle signal to the TXD pin the bus would be driven dominantly 99% of the time, and the small 1% of the time that the TXD waveform went high would reset the timer allowing for the bus to go back to the dominant state.

    Please let us know if you have any other questions,

    John

     

  • 0 in reply to John Griffith
    Genius 5070 points

    John-san,

    Thank you for your reply.
    I answered it to the customer.

    Thanks, Masami M.