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About LVPECL to LVPECL dc coupling

Other Parts Discussed in Thread: LP3878

 After studied TI scaa062, I have a question

The Typical Reciever LVPECL input Vcm=2V=3.3-1.3(V)

But the Figure 2. the common mode voltage of the Black point  between 130ohm & 82 ohm is 1.3V != 2V

According to LVPECL to LVPECL AC coupling guild scaa059c Figure3.

 The reciever common mode voltage of the Black point  between 83 ohm & 130 ohm is 2V it seems match the Typical LVPECL Reciever Vcm

input voltage.

Why the LVPECL DC coupling method of scaa062 LVPECL Reciever Vcm seems does not match the typical LVPECL input voltage? thanks!!

 

 

 

  • Hello,

    When DC coupling, the bias voltage created by the termination does not set the common-mode point but rather the low-level voltage. This is needed since the LVPECL output driver is designed to only be able to drive high levels (through a pull-up transistor). For the low levels, the driver will be high impedance and expect the signal to be pulled down externally (typically to 2 V below Vcc).

    For the AC-coupled case, the low levels are set by the driver-side pull-down resistance that is recommended. After AC-coupling, a resistor network is used to re-bias the differential signal to the desired common mode voltage.

    Please let me know if this is unclear or if you have any other questions.

    Regards,
    Max
  • Got it, thanks a lot!
  • Hi, Max

    When i terminate the LVPECL signals with 50 ohms resistors and VTT (VTT = VCC-2) ,if the linear regulator shoule be  capable of both sourcing

    and sinking current?

    Looking forward your reply. 

    Thanks.

  • Hi Chao,

    Do you mean that you are using a linear regulator to generate the 1.3-V termination voltage? If so, then when the LVPECL line is driving a high level, the LDO will have a voltage applied to its output that is higher than the set point. Ideally it would then be able to sink current in order to act as a low-impedance bias voltage source (maintaining the effective 50-Ohm impedance at the receive end to match the characteristic impedance of the transmission line). If the LDO is unable to sink current and instead allows its output to drift upwards, then the correct high-level voltage would likely still be established. The only concern I would have then would be the effective impedance seen at the end of the line, since it would be unlikely to still be 50 Ohms. For shorter or lower-speed links, this may not be critical.

    Most customers prefer not to use a separate regulator for the 1.3-V termination and instead use the equivalent termination network shown in Figure 2 of SCAA062. This technique gives a constant resistance as well as proper 1.3-V biasing, and is typically simpler to implement.

    Regards,
    Max
  • Hi, Max,

    Thanks for your reply.

    As you said, I used a LDO(LP3878) for 1.3v termination voltage.

    when power up the board, the 1.3v output changes to  2.5v which is ok when i cut the downstream circuits of the LDO.The LDO is only used for the LVPECL termination.I doubt that there are some problems of the termination,but don't know why. Do you have some advice?

    Now i plan to use the termination network show in SCAA062.

    Thanks again.

    Best Regards.

  • Chao,

    When you power up the board, is the LVPECL signal toggling between high and low levels? If so, you may be measuring either the high-level voltage on the LVPECL line or an average voltage level (if you are using a multimeter to observe DC voltages) when you observe 2.5 V. In any case, I would expect updating the termination network to the simpler resistive network to help the problem. Please let me know if you have any trouble with it, though.

    Regards,
    Max
  • Hi,MAX,

    Thank  you very much.

    I have changed the termination network to Y type. It will take me some time to  finish test.

    Best Regards.