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SN65LVDS100 Single-end LVPECL Input interface

cafain
Mastermind 6365 points
Other Parts Discussed in Thread: SN65LVDS100

SN65LVDS100 Single-end LVPECL Input interface

Hi

In the data sheet page26 Figure47 of SN65LVDS100 There are circuit example of Single-End.

+ Side input of SN65LVDS100 is tied to GND with a 50Ω.

I think the input signal GND to center amplitude in this connection.

50Ω termination resistor is I believe is correct to connect to VBB.

About my ideas, please comment.

Best regards

  • 0
    TI__Guru 62910 points
    Hi Cafain,

    When interfacing single-ended signals to a differential input, ideally you would have the (-) side tied to a voltage that is between the single-ended signal's high-level and low-level voltages. For Figure 47, this is set by pulling the ECL output down to ground (to set a fairly low low-level voltage) and then biasing the inverting input to VBB (~1.95 V). This is a simple implementation in term of number of components needed, although some ECL outputs may not be designed with such a strong pull-down in mind. If you wanted to lessen the loading on the ECL driver, you could use a higher termination voltage. You could not use VBB as a termination voltage in this case, though, since then the ECL low level would never be below the reference voltage. This would result in a differential input to the LVDS100 that is always positive (i.e., the "high" state).

    Regards,
    Max
  • 0 in reply to Max Robertson
    Mastermind 6365 points
    Hi
    Answer, Thank you.
    Examined try.
    Best regards