RS485 IC with auto Direction control

Hi Eby,

TI currently does not offer any RS-485 transceivers with auto direction control.

This feature can be implemented externally though through the use of a timing control one-shot circuit or a timing control circuit using an inverting buffer. In both of these applications the transceiver driver enable pin is controlled by the external timing circuits enabling auto direction control. A colleague of mine wrote a great application note on this topic and you can read it here.

Please let me know if you have any questions about the circuit implementation and I will be glad to help!

HI Eby,

Could you please go into a little more detail about the communication architecture? Are you saying that you have an RS-232 and RS-485 transceiver sharing the same bus but only one is active at a time through the enable and disable pins on the devices? Understanding the application better will help me better answer your question on common practices. At this point I am unsure on what you are trying to do.

Hi Eby,

We did a reference design for a bus that shares an RS-485 transceiver and a RS-232 transceiver, below is a PDF of the schematic. We designed the board to support two full duplex RS-485 transceivers and two full duplex two channel RS-232 transceivers. Each device is enable via a jumper on the board.

RS-485_RS-232E1(001)_Sch.PDF

After you review this I can answer any questions you have and I can also provide you with the rest of the required board file (i.e. BOM, Gerbers, and Layout). I also have a board in the lab that I can send you for further evaluation.In return could you please tell me the company that you are with and the end application you intend to use this in? We like to track this information to see what customers are using which devices in what applications. This helps us better support you in the long run. We can move the conversation off line if need be. My email address is mpeffers@ti.com.

Hi Eby,

The same principles applied to the dual bus design I provided can be implemented in a single bus solution. The design would simply move to a half duplex architecture instead of full duplex. I was not 100% involved with this TI Design so I am not sure what the motivation behind the full duplex design was but I thought it was applicable to your situation. In my opinion the design was positioned this way because the topic must have been a common problem raised by our customers and FAEs in the field.

RS-485 and RS-232 can exist on the same bus so long as the 485 transceiver has enough head room to deal with the large voltage swings associated with 232 and the enables are handled properly for each situation. The other challenge with your design will be with the protocol controller as it will have to deal with RS-232 vs RS-485 on different input pin, if they truly existed on the same bus between two or more end points.

What are your major concerns with your designs? If the processor only supports RS-232 communication why is there so much emphasis on supporting RS-485? Why not just focus the design around 232? I think I can address the topic here better if I had a clearer picture of what the goals of the design are. If you could articulate the goals of the design for me I think that we could reach a solution faster.