I'm trying to use this as a 3.3V to 24V digital level shifter. I am using this to drive JTAG !TRST, TMS, TCK and TDI form a programming pod over a cable. The receiver has opto-couplers with a 10K pullup to 24V. I have the reset pulled up but chose not to connect the FLT or RDY lines. I connected the DESAT to ground. When I perform a static test, 5K pullup resistor to 3.3V to the input pin my signal makes all the way across the cable and at the JTAG header in my device I see perfect logic levels. I'm looking at all 4 lines on a 4 channel scope so I can also verify there are no shorts between signals.
After this static test I noticed that by tapping my hand wired proto-type interface I could get multiple signal to switch to a "1". The ones switching were left floating. I'm not sure if they need some type of termination to prevent unwanted behavior. Do they?
When I connect my JTAG pod (on the 3.3V side with appropriate 3.3v and gnd references) I see two of my 4 signals behaving as expected. The TMS line, which with a direct JTAG pod connection to the board (no ISO5851s involved) stays "1" when not in use then is "1" for a the first clock. With the ISO5851 it stays "0" when not used. The signal I believe is the problem is the TCK. With the ISO5851 the output does not swing full from 0V to 24V (swings 20V to 24 V) and consequently the signal at the board's JTAG header does not reach and adequate logic "0" level. The clock period is 3.3 msec so it seems like the chip should be able to keep given the max propagation time of 110 nsec.
Am I missing something? Should I wire things up differently? Is there a better solution for level shifting 3.3V to 24V. By the way, the loading is 24V/10K ohms or 2.4 mA. So I don't need the drive capacity this chip offers.
