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SN65LBC184 questions

Other Parts Discussed in Thread: SN65HVD08, SN65LBC184

Hello,

We are considering the SN65LBC184 and the SN65HVD08 for a design, and need some help with the differences between the two with respect to the failsafe biasing during idle conditions.   We notice that the SN65LBC185 gives a larger difference between channel A and channel B during idle. The SN65HVD08 has both A and B at similar potential which is causing crosstalk issues, which is causing the Vid to be < -200mV when idle.

We have no fail safe biasing on the board, and would like to use SN65LBC184 instead, because the difference when idle is great enough that we don't see crosstalk. Speed is not an issue as my interface is 19.2k Baud. Can you please provide me with an explanation as to why SN65LBC184 is showing this result? Also can you point me in the right direction of additional transceivers that will give me similar result as the SN65LBC184?

Thanks

  • Hi Jamaal,

    Sorry for the delay. The failsafe implementation in LBC184 is a little unusual compared to our other RS-485 transceivers in that it produces a voltage offset that can be directly observed on the A and B pins. This means that the failsafe biasing is applied to the rest of the RS-485 network as well (not just the LBC184 receiver). The HVD08's failsafe protection is implemented in such a way that the offset is added internally and does not apply to other transceivers on the bus. You could get similar behavior (and finer control of the offset voltage introduced) by using external biasing resistors (e.g., a pull-up resistance on the A line and a pull-down resistance on the B line).

    Regards,
    Max