For TLK10002 normal operation, we need to first apply an external clock to TLK10002's REFCLK0 to let CDR working probably and produce a good recovered clock,
then connect the recovered clock to an external dejitter IC lmkxxxxx to generate a new, clean clock to TLK10002's REFCLK1 and switch TLK10002's working clock to this new clock..
Will the switch from REFCLK 0 to REFCLK 1 cause any unstable state or out of lock state for the CDR in TLK10002? Thank.