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TLK10031: Link issue

Part Number: TLK10031

HI Sir 

I use one TLK10031 to do the TX (transceiver) and one TLK10031 to do the RX (receiver) 

So far we meet link error issue (FPGA have link error count) ,Please kindly help 

Result 

1. Use 10G LR Fiber module + 10KM fiber cable ==> test fail 

2. Use 10G SR Fiber module + 300M fiber cable ==> test pass

Test method 

1. We add "enable HS test pattern generation, enable HS test pattern verification" in bring up's code ==> Test Fail 

2. Due to if end user re-plug the cable or TX and RX power on isn't at the same time ,it still have link error issue 

So our FPGA detect if cable re-plug or FPGA have error count message ,than FPGA will program TLK10031 to do "enable HS test pattern generation, enable HS test pattern verification" again ,the Link error will be solved 

Our question 

1. Do you have any idea why need to enable test pattern generation and verification can solved this issue ?

2. Due to I can't make sure this solution have side effect or not ,if we don't enable pattern gen and verification ,Have any solution can solve this issue ?

Thanks 

  • Hi Kai,

    The TLK10031 is intended for 3 operating modes: 10GBASE-KR, 1GKX and 10G General Purpose. To interface with SFP+ optical modules, the TLK10031 should be configured in 10GBASE-KR mode, Link Training and Auto-Negotiation (Clause 73) disabled and SERDES registers should be configured according the characteristics of the system (AC losses, length of traces, etc.).
    Could you clarify the procedure to link-up the device (registers)?

    Thanks,
    Luis Omar Moran
    High Speed Interface
    SWAT Team