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SN65HVD3082E: Interface IC SN65HVD3082E failure

Part Number: SN65HVD3082E
Other Parts Discussed in Thread: THVD1500, SN65LBC184


We have purchased SN65HVD3082E IC from Future electronics for our Company requirement (QTY 1000)
But frequent failure observed for same IC in our PCB where we are using  IC SN65HVD3082EP. Operating conditions are within range as per datasheet, attached basic configuration used in our instrument.



So please help us to find root cause for failed component on urgent basis since failure rate is high.Our queries:

1. What precautions we can take in current design to avoid IC damage?

2. Any 1:1 option to SN65HVD3082E with High ESD rating?

  • Hi Vaibhav,

    Do you have any idea which portion of the chip is being damaged? Typically the most common points of failure are the RS-485 signal pins, since these interface to external ports which may allow for over-stresses like ESD events or short-circuits. Generally these failures can be diagnosed by measuring the input resistance of the A/B pins to ground and comparing it to a known-good chip (which should present a high impedance).

    If the bus lines are being damaged, it is useful to know whether they are being damaged due to transient (short-duration) stresses or DC (long-duration) stresses, since each problem typically has a different solution. If the application doesn't present a risk of a short-circuit to a power supply (for example, due to miswiring in the field, due to a cable/connector issue, etc.), though, then a transient stress is probably more likely. To protect against these, you could try using a transceiver with more internal protection against ESD. The THVD1500 would be a good pin-to-pin replacement option for the SN65HVD3082E in this case. You could also implement protection externally with a TVS diode. Here is a blog that goes into some details on TVS selection: e2e.ti.com/.../how-to-choose-a-tvs-diode-for-rs-232-rs-485-and-can-based-on-voltage-ratings. You can also see an example implementation here: www.ti.com/.../tida-00730.

    If other pins are failing then we may need to look into other solutions. This shouldn't be the case as long as all the recommended operating conditions are followed, though.

    Regards,
    Max
  • Dear Max,

    Thanks for your reply and suggestion.

    We have checked resistances of working and non working IC's and found bus resistance and supply pin resistance wrt Gnd is changed. Below table for your ref.

    Pin Resistance wrt Gnd Ok IC Not Ok IC 1 Not Ok IC 2 Not Ok IC 3

    <

    Pin Resistance wrt Gnd Ok IC Not Ok IC 1 Not Ok IC 2 Not Ok IC 3
    Pin 1(R) Open 13MΩ 0.5MΩ 0.5MΩ
    Pin2 (RE~) Open 14MΩ 0.5MΩ 0.5MΩ
    Pin3 (DE) 5.1MΩ 13MΩ 0.5MΩ 0.5MΩ
    Pin4 (D) Open 13MΩ 0.5MΩ 0.5MΩ
    Pin 6 (A) 0.8 MΩ 35 KΩ 170 KΩ Open Bus and Supply resistance changed
    Pin 7 (B) 0.8 MΩ 32 KΩ 0.7 MΩ 420 KΩ
    Pin 8 (VCC) Open 7 MΩ 2.1 KΩ 1.7MΩ

    Suggested IC THVD1500 is in SOIC package , can you suggst IC with more ESD suppression in DIP (Through Hole) package?

  • In the DIP package, SN65LBC184 would be the best option. It has very high ESD tolerance (30 kV IEC 61000-4-2 contact discharge).

    Regards,
    Max
  • Ok, we will check above option. This RS485 IC is used for internal communication between PCB's. So bus pins coming in contact with end user chances are unlikely. But as you said SN65LBC184 has higher ESD, we will evaluate this IC in our instrument.
  • Vaibhav,

    That sounds good. Please let us know if you encounter any issues throughout the evaluation.

    Regards,
    Max

  • Hello Max,

    Is it recommended to use IC Socket for DIP package? Will it hamper performance or not recommended for ESD discharge on pins?

    Regards,

    Vaibhav

  • Vaibhav,

    In general it is OK to use a DIP socket since these devices primarily operate at low speeds. Sometimes they can create a poor mechanical connection (compared to a solder connection), though, and that is something to be careful about. A socket can have some effect on ESD performance as well if an ESD model with very fast rise/fall times (like IEC 61000-4-2) is used, since the parasitic inductance of the socket leads may distort the ESD waveform. This effect is generally fairly minor, though, and should not result in significant differences in a device's ESD performance.

    Max