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Industrial Interface

Welcome to the Industrial Interface Section of the TI E2E Support Community. Ask questions, share knowledge, explore ideas, and help solve problems with fellow engineers. To post a question, click on the forum tab then "New Post".

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Ethernet
  • 100BaseFX
  • BIST
  • DP83620
  • DP83630
  • DP83640
  • DP83848
  • DP83848C Ethernet PHY
  • DP83848I
  • ENET
  • Ether PHY
  • Ethernet PHY
  • Ethernet phy National
  • Ethernet TLK110
  • FPGA PHY
  • IEEE 1588
  • LAYOUT
  • PHY
  • recovered clock mode
Related Posts
  • Forum Post: National Semiconductor Ethernet phy

    Massimo Santoni Massimo Santoni
    hi, I'm interested in National'sethernet RMII phy, in robotic application. Can someone tell me if the basic DP83848I and the Precision PHYTER DP83630 or DP83640 are pinout compatible. if someone has already used this, there's a real improvement in use the precision series? thanks...
    on Dec 20, 2011
  • Forum Post: Re: DP83620

    Patrick O'Farrell Patrick O'Farrell
    We have an application note that provides the power consumption in great detail for various operational modes. The document is AN-1540 (Literature Number: SNLA089B). It is available on-line at: http://www.ti.com/litv/pdf/snla089b The application note was generated for the DP83848 family so the numbers...
    on Mar 8, 2012
  • Forum Post: Ethernet interface with dp83848c

    schneider jean-marie schneider jean-marie
    Hello, I have to had to the board I am working on, an ethernet interface. I would like to use dp83848c as interface, but as I not use at all with this technology, I have some difficulties with the choice of oscillator and the RJ45 magnetic jack. From documentation I read mainly from TI site...
    on Mar 15, 2012
  • Forum Post: Re: DP83848YB JTAG electrical timing info

    Patrick O'Farrell Patrick O'Farrell
    The maximum operating frequency of TCK is 10 MHz. This is specified in the BSDL model, but the syntax may not be immediately obvious. Section B.8.9.1 of IEEE 1149.1 defines <clock record> as the maximum operating frequency of TCK in Hertz. Our BSDL model includes the following: attribute...
    on Mar 16, 2012
  • Forum Post: Re: Ethernet interface with dp83848c

    Patrick O'Farrell Patrick O'Farrell
    Jean-Marie, The series termination resistors for CRS/CRS_DV and RX_ER are not required, but they can help you in the process of optimizing signal integrity. If you determine during prototyping that they are not needed, you can replace them with zero Ohm resistors or with traces in subsequent builds...
    on Mar 19, 2012
  • Forum Post: Re: Ethernet interface with dp83848c

    schneider jean-marie schneider jean-marie
    Thanks you Patrick for these helpful informations. On the DP83848c eval board layout, mass plan and VCC plan are under RJ45 connector. I will follow recommendation write in all of your documentation and underline in your last answer, but why did there is those in this eval board ? I attach the beginning...
    on Mar 22, 2012
  • Forum Post: Re: Ethernet interface with dp83848c

    Patrick O'Farrell Patrick O'Farrell
    Jean-Marie, The schematic looks very good. I do not see any issues. In the layout, it appears that power and ground are being routed to the RJ-45 connector pins (beneath the connector) as traces rather than being connected to the planes. Is that correct? Our recommendation is to void the planes...
    on Mar 30, 2012
  • Forum Post: DP83848I : PHY - Test with BIST mode

    Gary Poon1 Gary Poon1
    I have been doing a project with DP83848I and the Atmel UC3A MCU. Actually I have made a working sample by using the Atmel evaluation board EVK1105. However then when I use my own board, I could not communicate with the board by the PC. When I connect the board with the PC by a Cat5e cable, the PC show...
    on Nov 9, 2012
  • Forum Post: DP83630 vs. DP83640 vs. DP83620

    Jaden Ghylin102047 Jaden Ghylin102047
    1) WHAT IS THE DIFFERENCE BETWEEN THE DP83640 AND THE DP83630? THE MAIN DIFFERENCE I SEE IS THAT THE DP83630 IS IN A LEADLESS PACKAGE AND IT IS QUITE A BIT LOWER IN COST. ARE THESE THE ONLY DIFFERENCES? 2) WHAT IS THE DIFFERENCE BETWEEN THE DP83630 AND THE DP83620? THE MAIN DIFFERENCE I SEE IS...
    on Dec 3, 2012
  • Forum Post: Require to transmit fast ethernet signals with recovered clock for 100BaseFX operation using MII

    Hemant Ghayal Hemant Ghayal
    Which Phyter chip I can use for operating it in a way where the ethernet received clock can be used for transmitting ethernet signals, instead of using the crystal clock for this purpose. Also would like to know the register settings / external connections for using the phyter chip this way. I will be...
    on Dec 21, 2012
  • Forum Post: XPS_ETHERNETLITE + DP83640 PHY doesn't run (FMC-ISMNET)

    Ravil Latipov Ravil Latipov
    Hi, this is post to Avnet tech support. It requires expertise on DP83640 vs DP83848 PHYs, so i post it here as well: I have problem making standard design for Avnet LX16 board with XPS_ETHERNETLITE core working with FMC-ISMNET card (DP83640 PHY). This problem can be characterized as "XPS_ETHERNETLITE...
    on Jan 3, 2013
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