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Interrupt Controller - needed

Hi,

I am looking for an interrupt controller that can take multiple interrupts, maintain the interrupt table and then subsequently generate a single interrupt output to an external host controller. Then External host controller will read the interrupt controller through I2C or so, understands about the source of interrupt and service the routine accordingly. Since external host controller does not have good number of input interrupts, I am looking for a dedicated interrupt controller. Upon looking at TI website, I could not find any such suitable interrupt controller. Can you suggest suitable interrupt controller?

Regards,

Vikas Chandra Rao.

  • Hi Vikas,

    I made a search but I can not find a separate interrupt controller chip designed by TI.

    All TI interrupt controllers are integrated inside the TI SoCs.

    For example, AM3358 SoC have two interrupt controllers, one (up to 128 interrupt requests) integrated inside the Cortex-A8 MPU subsystem, second for handling system input events for PRU-ICSS. Refer to the AM3358 documentation (datasheet, TRM) for details.

    Another TI SoCs have also interrupt controllers dedicated for DSP events and Cortex-M3/M4 events.

    Regards,
    Pavel



  • In reply to Pavel Botev:

    Thanks Pavel for confirming.

    Regards,

    Vikas Chandra Rao.

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