Hi,
I'm using the SN75DP130 in order to equalize the displayport signal in a sink application
The SN75DP130 is connected to a FPGA
In summary : DP Connector -> SN75DP130 -> FPGA
I have some difficulty to obtain a locked video signal in HBR2 (4K60) through a 10m cable.
Notes :
- I use a Lindy Gold cables
- That's work over 10m cables with monitors sink
- That's work over 5m cables with my product (i'll will try on 7.5m soon)
Regarding the SN75DP130 :
Based on the TI Application Report : slla349.pdf (Implementation Guide: DP130 in a Sink) :
The SN75DP130 is actually programmed with EQ_I2C_Enable (reg 05.7) to High (Enabled), Link_Training_On/Off (reg 04.2) to Low (Off)
I also set the AEQ(L1) to 6dB(HBR)/13dB(HBR2) and i have disabled the Squelch (It's seem to be better than 40mV or 80mV)
Also, i write on DPCD : HBR2, 4lanes, Power mode Normal
I already try all AEQ(L1) parameters from 0dB to +18dB(HBR2) without success.
Regarding the schematics :
Based on TI eval board (sllu143a.pdf) and others DP eval board, i have connected AC-coupling (100nF) on each differential pair between the connector and the SN75DP130.
But on the VESA DisplayPort Standard Version 1.4 (§3.5.2 Main-Link Electrical Sub-Block ; Figure 3-34), there are 2 topology :
- A : the connector is directly connected to the downstream device
- B : there are AC-Coupling and also 100k to 1M pull down resistor before the capa in order to fix the common voltage.
Here my questions :
- Is somebody use the SN75DP130 as sink application over long cable without problem?
- Is the SN75DP130 is really the good product for HBR2 Sink application?
- Is the SN75DP130 need AC-Coupling or it's recommended to use the VESA topologies?
- In a future revision of the board, i want to add ESD protection with diodes such as Murata LXES15AAA1-100. Is it a bad idea vs integrity of signal?
Best regards,
Olivier