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TL16C752D: about LSR and FIFO questions

Joyce Li
Intellectual 2170 points
Part Number: TL16C752D

Hi Dear experts,

My customer has some questions about TL16C752D, please kindly help on it!

1. what is the status of LSR bit 1(RX overrun Error) when FIFO is in writing procedure?

2. Do we support FIFO write and read at the same time?

3. how long time does it take to update LSR bit1?    

Thanks very much!

Joyce

  • 0
    TI__Expert 5455 points
    Hello Joyce

    1.- If the receiver is not overruning, the status will be 0 even if is writing, else, will be 1.

    2.- This is not possible because when you write/read on the UART, you have to use the parallel port (this port is input/output). Then is necessary do it separetely.

    3.- After receive the data and full the RHR register, when the next data arrives, the time will be 1 BCLK. Then you have to consider your current baud rate.

    Let me know if you have any other questions.

    Regards
    Francisco
  • 0 in reply to Francisco Javier Zamudio
    TI__Intellectual 2170 points

    Hi Francisco,

    Thanks a lot for your prompt reply. My customer found receiver FIFO is full, but there is more data coming in, and at this time LSR bit 1 and bit 0 status is changing between 0 and 1.

    ZTE didn't use flow control function.

    Can you please help identify what is the root cause of LSR strange status?

    thanks very much!

    Joyce

               

  • 0 in reply to Joyce Li
    TI__Expert 5455 points
    Hello Joyce

    This device can only receive up to 64 bytes, if you want to receive more data, it is necessary to empty the FIFO (FIFO reading). LSR [0] indicates that it has data in the receiver. It is much better to avoid overrun in the receiver.

    Regards
    Francisco