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Linux/OMAP5432-EVM: CSI-2[MIPI] Camera Support on OMAP5432-EVM Board

Part Number: OMAP5432-EVM

Tool/software: Linux

Dear Sir/madam;

We had purchase the "omap5-uevm" board to test the ov5640 5MP camera sensor on CSI-2 [MIPI] interface.

We follow the "http://processors.wiki.ti.com/index.php/OMAP5_GLSDK_Software_Developers_Guide" Document to test the CSI-2[MIPI] interface on OMAP5432-uevm board.

As per above link we need "ti-processor-sdk-linux-automotive-omap5-uevm-6.04.00.02-installer.bin" SDK but we are unable to find the SDK also we are not finding any document which guide us how to test the camera sensor on csi-2[MIPI] interface for OMAP5432-uevm board.

We had try to post above issue on "TI-Forum" but omap5 forum was read-only so we can't do this.

So Please provide us the support for above as soon as possible.

Thanks & Best Regards,
Nikunj Patel

  • Hi Nikunj,

    The OMAP5 latest SDK (GLSDK 6.04.00.02) is available at the below link:

    downloads.ti.com/.../index_FDS.html

    ti-glsdk_omap5-uevm_6_04_00_02_linux-x64-installer.bin

    Regards,
    Pavel

  • Dear Pavel,

    We had already download "ti-glsdk_omap5-uevm_6_04_00_02_linux-x64-installer.bin" SDK from http://downloads.ti.com/dsps/dsps_public_sw/glsdk/6_04_00_02/index_FDS.html link.

    We had been start development on OMAP5-uevm Board but we need to interface the CSI-2[MIPI] Camera on OMAP5-uevm for end application. We check whole SDK but there was no any support for csi-2[MIPI] camera.

    Also as per TI Forum "https://e2e.ti.com/support/omap/f/885/t/288119" Yanko [TI's Engineer] had answer on "Feb 13, 2014 10:21 AM" that "The ISS driver is a part from the OMAP5 GLSDK 6.03.00.01" so we have been try to download GLSDK 6.03.00.01 from "https://www.ti.com/licreg/docs/swlicexportcontrol.tsp?form_type=1&prod_no=/ti-glsdk_omap5-uevm_6_03_00_01_linux-installer.bin" link on 20th Nov as per attached image. but still we can't get any support for that.

    So Please provide us the support for camera interface as soon as possible.

    Thanks & Best regards;

    Nikunj Patel

  • Nikunj,

    We might have something in OMAP5 GLSDK, but it will be limited. The main source is in Ducati firmware which is not available in public. Please refer to the below e2e thread for details (make sure you have install/fetch everything through the scripts):

    e2e.ti.com/.../334544

    For full support of CSI2, you might switch to newer devices like DRA72x/AM571x/TDA2x/TDA3x. These devices have CAL IP and fully support CSI2:

    processors.wiki.ti.com/.../Linux_Core_CAL_User's_Guide
    processors.wiki.ti.com/.../Processor_SDK_Linux_Automotive_Software_Developers_Guide

    Regards,
    Pavel

  • Dear Pavel;

    Thanks for quick support.

    I have checked the "e2e.ti.com/.../334544" link but it show the "OMAP5 GLSDK 6.03.00.01" SDK. We had try to download that as per earlier message but still we can not got that so please provide us.

    I have check "processors.wiki.ti.com/.../Linux_Core_CAL_User's_Guide" &" "processors.wiki.ti.com/.../Processor_SDK_Linux_Automotive_Software_Developers_Guide" link also but this both link have support for AM571x & DRA7XX SOC which have the "CAL"[Camera access Layer] core but OMAP5432 have "ISS"[Image SUB System] core so both have different device driver.

    1. CAL require the "TI-CAL" driver

    2. ISS require the "OMAP4-ISS" or "OMAP5-ISS" Driver.

    We search for OMAP5432 CSi-2 Camera support but we can't find much about that.

    Today we follow the "patchwork.kernel.org/.../" link which have provide the patch for "omap4-iss" camera driver. We have applying this patch and some modification in dtb files as per attached . now the camera sensor and mipi detection is started but the driver is crash with below message

    [ 9.680426] omap4_iss: module is from the staging directory, the quality is unknown, you have been warned.
    [ 9.684182] omap4iss 52000000.iss: parsing endpoint /ocp/iss@52000000/ports/port@0/endpoint, interface 0
    [ 9.684190] omap4iss 52000000.iss: clock lane polarity 0, pos 4
    [ 9.684195] omap4iss 52000000.iss: data lane 0 polarity 0, pos 0
    [ 9.684200] omap4iss 52000000.iss: data lane 1 polarity 0, pos 1
    [ 9.684206] omap4iss 52000000.iss: data lane 2 polarity 0, pos 0
    [ 9.684211] omap4iss 52000000.iss: data lane 3 polarity 0, pos 0
    [ 9.684240] OF: ERROR: Bad of_node_put() on /ocp/iss@52000000/ports/port@0/endpoint
    [ 9.691934] CPU: 1 PID: 208 Comm: systemd-udevd Tainted: G C 4.9.60-armv7-lpae-x5 #13
    [ 9.691937] Hardware name: Generic OMAP5 (Flattened Device Tree)
    [ 9.691956] [<c01144c4>] (unwind_backtrace) from [<c010dbe4>] (show_stack+0x20/0x24)
    [ 9.691968] [<c010dbe4>] (show_stack) from [<c074e98c>] (dump_stack+0x94/0xb0)
    [ 9.691979] [<c074e98c>] (dump_stack) from [<c0afec30>] (of_node_release+0x98/0xa0)
    [ 9.691988] [<c0afec30>] (of_node_release) from [<c0750da8>] (kobject_put+0x104/0x1f8)
    [ 9.691994] [<c0750da8>] (kobject_put) from [<c0afda1c>] (of_node_put+0x24/0x28)
    [ 9.692002] [<c0afda1c>] (of_node_put) from [<c0af918c>] (__of_get_next_child+0x58/0x70)
    [ 9.692010] [<c0af918c>] (__of_get_next_child) from [<c0af91dc>] (of_get_next_child+0x38/0x54)
    [ 9.692018] [<c0af91dc>] (of_get_next_child) from [<c0af9438>] (of_graph_get_next_endpoint+0x4c/0x13c)
    [ 9.692046] [<c0af9438>] (of_graph_get_next_endpoint) from [<bf2ed180>] (iss_probe+0x90/0xc58 [omap4_iss])
    [ 9.692085] [<bf2ed180>] (iss_probe [omap4_iss]) from [<c0932200>] (platform_drv_probe+0x60/0xc0)
    [ 9.692094] [<c0932200>] (platform_drv_probe) from [<c092fd14>] (driver_probe_device+0xf8/0x428)
    [ 9.692102] [<c092fd14>] (driver_probe_device) from [<c0930134>] (__driver_attach+0xf0/0x104)
    [ 9.692108] [<c0930134>] (__driver_attach) from [<c092d88c>] (bus_for_each_dev+0x88/0xd0)
    [ 9.692114] [<c092d88c>] (bus_for_each_dev) from [<c092f548>] (driver_attach+0x28/0x30)
    [ 9.692121] [<c092f548>] (driver_attach) from [<c092ef74>] (bus_add_driver+0x158/0x26c)
    [ 9.692127] [<c092ef74>] (bus_add_driver) from [<c0930c50>] (driver_register+0x88/0x104)
    [ 9.692134] [<c0930c50>] (driver_register) from [<c0932140>] (__platform_driver_register+0x40/0x54)
    [ 9.692154] [<c0932140>] (__platform_driver_register) from [<bf2ff018>] (iss_driver_init+0x18/0xc0 [omap4_iss])
    [ 9.692176] [<bf2ff018>] (iss_driver_init [omap4_iss]) from [<c0101cdc>] (do_one_initcall+0x58/0x1a4)
    [ 9.692185] [<c0101cdc>] (do_one_initcall) from [<c0274e3c>] (do_init_module+0x6c/0x3c0)
    [ 9.692193] [<c0274e3c>] (do_init_module) from [<c01e4e60>] (load_module+0x1ee8/0x2534)
    [ 9.692200] [<c01e4e60>] (load_module) from [<c01e5758>] (SyS_finit_module+0xd4/0x110)
    [ 9.692207] [<c01e5758>] (SyS_finit_module) from [<c0108ee0>] (ret_fast_syscall+0x0/0x3c)

    So please check that and provide us the support as soon as possible.

    Thanks & Best Regards,

    Nikunj Patel

    omap5-uevm_dts.txt
    /*
     * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
     *
     * This program is free software; you can redistribute it and/or modify
     * it under the terms of the GNU General Public License version 2 as
     * published by the Free Software Foundation.
     */
    /dts-v1/;
    
    #include "omap5-board-common.dtsi"
    
    / {
    	model = "TI OMAP5 uEVM board";
    	compatible = "ti,omap5-uevm", "ti,omap5";
    
    	memory@80000000 {
    		device_type = "memory";
    		reg = <0 0x80000000 0 0x7f000000>; /* 2032 MB */
    	};
    
    	leds {
    		compatible = "gpio-leds";
    		led1 {
    			label = "omap5:blue:usr1";
    			gpios = <&gpio5 25 GPIO_ACTIVE_HIGH>; /* gpio5_153 D1 LED */
    			linux,default-trigger = "heartbeat";
    			default-state = "off";
    		};
    	};
    };
    
    &hdmi {
    	vdda-supply = <&ldo4_reg>;
    };
    
    &i2c5 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&i2c5_pins>;
    
    	clock-frequency = <400000>;
    
    	gpio9: gpio@22 {
    		compatible = "ti,tca6424";
    		reg = <0x22>;
    		gpio-controller;
    		#gpio-cells = <2>;
    	};
    };
    
    &omap5_pmx_core {
    	i2c5_pins: pinmux_i2c5_pins {
    		pinctrl-single,pins = <
    			OMAP5_IOPAD(0x1c6, PIN_INPUT | MUX_MODE0)		/* i2c5_scl */
    			OMAP5_IOPAD(0x1c8, PIN_INPUT | MUX_MODE0)		/* i2c5_sda */
    		>;
    	};
    };
    
    &tpd12s015 {
    	gpios = <&gpio9 0 GPIO_ACTIVE_HIGH>,	/* TCA6424A P01, CT CP HPD */
    		<&gpio9 1 GPIO_ACTIVE_HIGH>,	/* TCA6424A P00, LS OE */
    		<&gpio7 1 GPIO_ACTIVE_HIGH>;	/* GPIO 193, HPD */
    };
    
    &twl6040 {
    	ti,audpwron-gpio = <&gpio5 13 GPIO_ACTIVE_HIGH>;  /* gpio line 141 */
    };
    
    &twl6040_pins {
    	pinctrl-single,pins = <
    		OMAP5_IOPAD(0x1be, PIN_OUTPUT | MUX_MODE6)	/* mcspi1_somi.gpio5_141 */
    	>;
    };
    
    &wlcore {
    	compatible = "ti,wl1837";
    };
    
    
    omap5-uevm-dmesg_log.txt
    [    9.185788] ov5640 2-003c: XVCLK set to rounded aproximate (19200000 Hz)
    [    9.185850] ov5640 2-003c: Got GPIOs {reset = 226, power down = 13}
    [    9.273356] palmas-usb 48070000.i2c:palmas@48:palmas_usb: USB-HOST cable is detached
    [    9.395770] usbcore: registered new interface driver usbfs
    [    9.395822] usbcore: registered new interface driver hub
    [    9.397011] usbcore: registered new device driver usb
    [    9.409415] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
    [    9.432019] ehci-omap: OMAP-EHCI Host Controller driver
    [    9.446123] ehci-omap 4a064c00.ehci: EHCI Host Controller
    [    9.446144] ehci-omap 4a064c00.ehci: new USB bus registered, assigned bus number 1
    [    9.446426] ehci-omap 4a064c00.ehci: irq 405, io mem 0x4a064c00
    [    9.468249] ehci-omap 4a064c00.ehci: USB 2.0 started, EHCI 1.00
    [    9.468486] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
    [    9.468491] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
    [    9.468496] usb usb1: Product: EHCI Host Controller
    [    9.468500] usb usb1: Manufacturer: Linux 4.9.60-armv7-lpae-x5 ehci_hcd
    [    9.468504] usb usb1: SerialNumber: 4a064c00.ehci
    [    9.469187] hub 1-0:1.0: USB hub found
    [    9.469215] hub 1-0:1.0: 3 ports detected
    [    9.606580] omap_wdt: OMAP Watchdog Timer Rev 0x01: initial timeout 60 sec
    [    9.613244] omap-hdmi-audio omap-hdmi-audio.0.auto: snd-soc-dummy-dai <-> 58040000.encoder mapping ok
    [    9.680426] omap4_iss: module is from the staging directory, the quality is unknown, you have been warned.
    [    9.684182] omap4iss 52000000.iss: parsing endpoint /ocp/iss@52000000/ports/port@0/endpoint, interface 0
    [    9.684190] omap4iss 52000000.iss: clock lane polarity 0, pos 4
    [    9.684195] omap4iss 52000000.iss: data lane 0 polarity 0, pos 0
    [    9.684200] omap4iss 52000000.iss: data lane 1 polarity 0, pos 1
    [    9.684206] omap4iss 52000000.iss: data lane 2 polarity 0, pos 0
    [    9.684211] omap4iss 52000000.iss: data lane 3 polarity 0, pos 0
    [    9.684240] OF: ERROR: Bad of_node_put() on /ocp/iss@52000000/ports/port@0/endpoint
    [    9.691934] CPU: 1 PID: 208 Comm: systemd-udevd Tainted: G         C      4.9.60-armv7-lpae-x5 #13
    [    9.691937] Hardware name: Generic OMAP5 (Flattened Device Tree)
    [    9.691956] [<c01144c4>] (unwind_backtrace) from [<c010dbe4>] (show_stack+0x20/0x24)
    [    9.691968] [<c010dbe4>] (show_stack) from [<c074e98c>] (dump_stack+0x94/0xb0)
    [    9.691979] [<c074e98c>] (dump_stack) from [<c0afec30>] (of_node_release+0x98/0xa0)
    [    9.691988] [<c0afec30>] (of_node_release) from [<c0750da8>] (kobject_put+0x104/0x1f8)
    [    9.691994] [<c0750da8>] (kobject_put) from [<c0afda1c>] (of_node_put+0x24/0x28)
    [    9.692002] [<c0afda1c>] (of_node_put) from [<c0af918c>] (__of_get_next_child+0x58/0x70)
    [    9.692010] [<c0af918c>] (__of_get_next_child) from [<c0af91dc>] (of_get_next_child+0x38/0x54)
    [    9.692018] [<c0af91dc>] (of_get_next_child) from [<c0af9438>] (of_graph_get_next_endpoint+0x4c/0x13c)
    [    9.692046] [<c0af9438>] (of_graph_get_next_endpoint) from [<bf2ed180>] (iss_probe+0x90/0xc58 [omap4_iss])
    [    9.692085] [<bf2ed180>] (iss_probe [omap4_iss]) from [<c0932200>] (platform_drv_probe+0x60/0xc0)
    [    9.692094] [<c0932200>] (platform_drv_probe) from [<c092fd14>] (driver_probe_device+0xf8/0x428)
    [    9.692102] [<c092fd14>] (driver_probe_device) from [<c0930134>] (__driver_attach+0xf0/0x104)
    [    9.692108] [<c0930134>] (__driver_attach) from [<c092d88c>] (bus_for_each_dev+0x88/0xd0)
    [    9.692114] [<c092d88c>] (bus_for_each_dev) from [<c092f548>] (driver_attach+0x28/0x30)
    [    9.692121] [<c092f548>] (driver_attach) from [<c092ef74>] (bus_add_driver+0x158/0x26c)
    [    9.692127] [<c092ef74>] (bus_add_driver) from [<c0930c50>] (driver_register+0x88/0x104)
    [    9.692134] [<c0930c50>] (driver_register) from [<c0932140>] (__platform_driver_register+0x40/0x54)
    [    9.692154] [<c0932140>] (__platform_driver_register) from [<bf2ff018>] (iss_driver_init+0x18/0xc0 [omap4_iss])
    [    9.692176] [<bf2ff018>] (iss_driver_init [omap4_iss]) from [<c0101cdc>] (do_one_initcall+0x58/0x1a4)
    [    9.692185] [<c0101cdc>] (do_one_initcall) from [<c0274e3c>] (do_init_module+0x6c/0x3c0)
    [    9.692193] [<c0274e3c>] (do_init_module) from [<c01e4e60>] (load_module+0x1ee8/0x2534)
    [    9.692200] [<c01e4e60>] (load_module) from [<c01e5758>] (SyS_finit_module+0xd4/0x110)
    [    9.692207] [<c01e5758>] (SyS_finit_module) from [<c0108ee0>] (ret_fast_syscall+0x0/0x3c)
    [    9.709280] omap-abe-twl6040 sound: twl6040-legacy <-> 40132000.mcpdm mapping ok
    [    9.711094] input: omap5-uevm Headset Jack as /devices/platform/sound/sound/card1/input1
    [    9.737899] ov5640 2-003c: Detected a OV5640 chip, revision 0
    [    9.836841] usb 1-3: new high-speed USB device number 2 using ehci-omap
    [    9.850932] cgroup: new mount options do not match the existing superblock, will be ignored
    [    9.875005] Unable to handle kernel NULL pointer dereference at virtual address 00000000
    [    9.884256] pgd = ed5a0000
    [    9.884261] [00000000] *pgd=00000000
    [    9.884269] Internal error: Oops: 5 [#1] SMP ARM
    [    9.884322] Modules linked in: rfkill omap4_iss(C+) videobuf2_dma_contig videobuf2_memops videobuf2_v4l2 snd_soc_omap_abe_twl6040 videobuf2_core snd_soc_twl6040 snd_soc_omap_hdmi_audio omap_wdt ehci_omap ehci_hcd usbcore dwc3_c
    [    9.884327] CPU: 0 PID: 208 Comm: systemd-udevd Tainted: G         C      4.9.60-armv7-lpae-x5 #13
    [    9.884329] Hardware name: Generic OMAP5 (Flattened Device Tree)
    [    9.884332] task: ed595000 task.stack: ed63c000
    [    9.884342] PC is at __list_add+0x28/0xcc
    [    9.884348] LR is at v4l2_device_register_subdev+0xf8/0x178
    [    9.884353] pc : [<c076e91c>]    lr : [<c0a6c0c8>]    psr: 600e0013
                   sp : ed63db80  ip : ed63dba8  fp : ed63dba4
    [    9.884355] r10: ed298010  r9 : ee31f210  r8 : 00000004
    [    9.884358] r7 : ed6332bc  r6 : ed298018  r5 : 00000000  r4 : ed633260
    [    9.884360] r3 : 00000000  r2 : ed298018  r1 : 00000000  r0 : ed633260
    [    9.884364] Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment none
    [    9.884367] Control: 10c5387d  Table: ad5a006a  DAC: 00000051
    [    9.884370] Process systemd-udevd (pid: 208, stack limit = 0xed63c218)
    [    9.884373] Stack: (0xed63db80 to 0xed63e000)
    [    9.884378] db80: ed633200 ed298010 00000000 ed633200 ed298010 00000000 ed63dbc4 ed63dba8
    [    9.884383] dba0: c0a6c0c8 c076e900 ed298068 ed633200 ec0b82e4 ed6332bc ed63dbe4 ed63dbc8
    [    9.884387] dbc0: c0a76320 c0a6bfdc ed298068 c14f7c58 c14f7c58 c14f7d14 ed63dc0c ed63dbe8
    [    9.884391] dbe0: c0a76488 c0a762b0 00000001 ec0b82d0 00000004 00000000 00000004 ee31f210
    [    9.884396] dc00: ed63dc84 ed63dc10 bf2ed2ac c0a76394 00000000 ec1d2f50 ee31e5a0 c109ebd8
    [    9.884400] dc20: ed63dc4c ee31f200 00000000 00000000 eee0f0b8 00000002 00000100 00000100
    [    9.884405] dc40: 00020004 00000000 00000000 00000000 00000000 0004093c 00000000 ee31f210
    [    9.884409] dc60: ffffffef bf2f8414 fffffdfb 0000002e ec0b89a4 c01e17e4 ed63dca4 ed63dc88
    [    9.884414] dc80: c0932200 bf2ed0fc ee31f210 c15ec368 bf2f8414 00000000 ed63dcd4 ed63dca8
    [    9.884418] dca0: c092fd14 c09321ac ee31f244 ee31f244 ed63dcd4 ee31f210 ee31f244 bf2f8414
    [    9.884423] dcc0: c140414c ec0b8980 ed63dcf4 ed63dcd8 c0930134 c092fc28 00000000 bf2f8414
    [    9.884427] dce0: c0930044 c140414c ed63dd24 ed63dcf8 c092d88c c0930050 ed63dd30 ee0b4c5c
    [    9.884432] dd00: ee30fb34 0004093c bf2f8414 ed7fd580 c14e3f78 00000000 ed63dd34 ed63dd28
    [    9.884436] dd20: c092f548 c092d810 ed63dd5c ed63dd38 c092ef74 c092f52c bf2f6464 ed63dd48
    [    9.884440] dd40: bf2f8414 c140414c ffffe000 00000000 ed63dd74 ed63dd60 c0930c50 c092ee28
    [    9.884445] dd60: bf2ff000 c140414c ed63dd84 ed63dd78 c0932140 c0930bd4 ed63dd94 ed63dd88
    [    9.884449] dd80: bf2ff018 c093210c ed63de14 ed63dd98 c0101cdc bf2ff00c eff494c4 80070013
    [    9.884454] dda0: ed63ddec 0004093c c027eba4 a0070013 c0298564 0004093c 00000001 c02cdce0
    [    9.884458] ddc0: 024000c0 ee000980 ed63de14 ed63ddd8 c02cdce0 c0c93738 ed63de04 ed63dde8
    [    9.884462] dde0: c02ced64 c02ce29c 0000001b 0004093c bf2f9dc0 00000001 ec088700 00000001
    [    9.884466] de00: ec0b8980 ec0b89a4 ed63de3c ed63de18 c0274e3c c0101c90 ed63de3c ed63de28
    [    9.884471] de20: c02bbdc8 ed63df38 00000001 bf2f9dc0 ed63df14 ed63de40 c01e4e60 c0274ddc
    [    9.884476] de40: bf2f9dcc 00007fff bf2f9dc0 c01e24d8 ffffe000 c140414c bf2f9fbc c0d0911c
    [    9.884480] de60: bf2f9dcc ed63df38 bf2f9ed4 ed6204c4 bf2f9e08 c01e18ac 0001a6dc c1109d48
    [    9.884484] de80: ed25e180 ed63df2c 0001a6dc 00000000 00000000 00000000 00000000 00000000
    [    9.884489] dea0: 00000000 00000000 6e72656b 00006c65 00000000 00000000 00000000 00000000
    [    9.884493] dec0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [    9.884498] dee0: 00000000 0004093c 7fffffff c140414c 00000000 00000012 b6f02dd4 7fffffff
    [    9.884502] df00: 00000000 00000000 ed63dfa4 ed63df18 c01e5758 c01e2f84 7fffffff 00000000
    [    9.884506] df20: 00000003 ed63df30 c0298744 f11bb000 0001a6dc 00000000 f11bb000 0001a6dc
    [    9.884511] df40: f11d4fac f11d4df0 f11cd9a4 0000e000 00010240 bf2f8df8 0000007d 00000000
    [    9.884515] df60: 00004e9c 0000002c 0000002d 00000020 00000024 00000013 00000000 0004093c
    [    9.884520] df80: 023027a0 00000000 7e58ec00 0000017b c01090a4 ed63c000 00000000 ed63dfa8
    [    9.884524] dfa0: c0108ee0 c01e5690 023027a0 00000000 00000012 b6f02dd4 00000000 b6f03fa4
    [    9.884529] dfc0: 023027a0 00000000 7e58ec00 0000017b 00020000 004df234 02302368 00000000
    [    9.884534] dfe0: beae3928 beae3918 b6efcaef b6e4e6b2 600d0030 00000012 ee9be3f3 f76974df
    [    9.884544] [<c076e91c>] (__list_add) from [<c0a6c0c8>] (v4l2_device_register_subdev+0xf8/0x178)
    [    9.884554] [<c0a6c0c8>] (v4l2_device_register_subdev) from [<c0a76320>] (v4l2_async_test_notify+0x7c/0xe4)
    [    9.884561] [<c0a76320>] (v4l2_async_test_notify) from [<c0a76488>] (v4l2_async_notifier_register+0x100/0x150)
    [    9.884587] [<c0a76488>] (v4l2_async_notifier_register) from [<bf2ed2ac>] (iss_probe+0x1bc/0xc58 [omap4_iss])
    [    9.884612] [<bf2ed2ac>] (iss_probe [omap4_iss]) from [<c0932200>] (platform_drv_probe+0x60/0xc0)
    [    9.884620] [<c0932200>] (platform_drv_probe) from [<c092fd14>] (driver_probe_device+0xf8/0x428)
    [    9.884627] [<c092fd14>] (driver_probe_device) from [<c0930134>] (__driver_attach+0xf0/0x104)
    [    9.884633] [<c0930134>] (__driver_attach) from [<c092d88c>] (bus_for_each_dev+0x88/0xd0)
    [    9.884639] [<c092d88c>] (bus_for_each_dev) from [<c092f548>] (driver_attach+0x28/0x30)
    [    9.884645] [<c092f548>] (driver_attach) from [<c092ef74>] (bus_add_driver+0x158/0x26c)
    [    9.884651] [<c092ef74>] (bus_add_driver) from [<c0930c50>] (driver_register+0x88/0x104)
    [    9.884658] [<c0930c50>] (driver_register) from [<c0932140>] (__platform_driver_register+0x40/0x54)
    [    9.884677] [<c0932140>] (__platform_driver_register) from [<bf2ff018>] (iss_driver_init+0x18/0xc0 [omap4_iss])
    [    9.884697] [<bf2ff018>] (iss_driver_init [omap4_iss]) from [<c0101cdc>] (do_one_initcall+0x58/0x1a4)
    [    9.884707] [<c0101cdc>] (do_one_initcall) from [<c0274e3c>] (do_init_module+0x6c/0x3c0)
    [    9.884714] [<c0274e3c>] (do_init_module) from [<c01e4e60>] (load_module+0x1ee8/0x2534)
    [    9.884720] [<c01e4e60>] (load_module) from [<c01e5758>] (SyS_finit_module+0xd4/0x110)
    [    9.884727] [<c01e5758>] (SyS_finit_module) from [<c0108ee0>] (ret_fast_syscall+0x0/0x3c)
    [    9.884734] Code: e1530001 e1a05001 e1a04000 1a00000b (e5953000) 
    [    9.884738] ---[ end trace 5f492b95fca4f562 ]---
    [    9.961596] Bluetooth: Core ver 2.22
    [    9.961630] NET: Registered protocol family 31
    [    9.961632] Bluetooth: HCI device and connection manager initialized
    [    9.961642] Bluetooth: HCI socket layer initialized
    [    9.961652] Bluetooth: L2CAP socket layer initialized
    [    9.961673] Bluetooth: SCO socket layer initialized
    [   10.066180] usb 1-3: New USB device found, idVendor=0424, idProduct=9730
    [   10.066186] usb 1-3: New USB device strings: Mfr=0, Product=0, SerialNumber=0
    [   10.416814] usb 1-2: new high-speed USB device number 3 using ehci-omap
    [   10.607175] usb 1-2: New USB device found, idVendor=0424, idProduct=3503
    [   10.613928] usb 1-2: New USB device strings: Mfr=0, Product=0, SerialNumber=0
    [   10.623529] hub 1-2:1.0: USB hub found
    [   10.628438] hub 1-2:1.0: 3 ports detected
    [   11.260055] Bluetooth: BNEP (Ethernet Emulation) ver 1.3
    [   11.265398] Bluetooth: BNEP filters: protocol multicast
    [   11.271505] Bluetooth: BNEP socket layer initialized
    [   11.744037] smsc95xx v1.0.5
    [   11.854737] smsc95xx 1-3:1.0 eth0: register 'smsc95xx' at usb-4a064c00.ehci-3, smsc95xx USB 2.0 Ethernet, ee:94:f0:e4:43:43
    [   11.866730] usbcore: registered new interface driver smsc95xx
    [   11.952420] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
    
    ubuntu@arm:~$ dmesg | grep "ov5640"
    [    9.185788] ov5640 2-003c: XVCLK set to rounded aproximate (19200000 Hz)
    [    9.185850] ov5640 2-003c: Got GPIOs {reset = 226, power down = 13}
    [    9.737899] ov5640 2-003c: Detected a OV5640 chip, revision 0
    [    9.884322] Modules linked in: rfkill omap4_iss(C+) videobuf2_dma_contig videobuf2_memops videobuf2_
    
    omap5-board-common_dtsi.txt
    /*
     * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
     *
     * This program is free software; you can redistribute it and/or modify
     * it under the terms of the GNU General Public License version 2 as
     * published by the Free Software Foundation.
     */
    #include "omap5.dtsi"
    #include <dt-bindings/interrupt-controller/irq.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    
    / {
    	aliases {
    		display0 = &hdmi0;
    	};
    
    	vmain: fixedregulator-vmain {
    		compatible = "regulator-fixed";
    		regulator-name = "vmain";
    		regulator-min-microvolt = <5000000>;
    		regulator-max-microvolt = <5000000>;
    	};
    
    	vsys_cobra: fixedregulator-vsys_cobra {
    		compatible = "regulator-fixed";
    		regulator-name = "vsys_cobra";
    		vin-supply = <&vmain>;
    		regulator-min-microvolt = <5000000>;
    		regulator-max-microvolt = <5000000>;
    	};
    
    	vdds_1v8_main: fixedregulator-vdds_1v8_main {
    		compatible = "regulator-fixed";
    		regulator-name = "vdds_1v8_main";
    		vin-supply = <&smps7_reg>;
    		regulator-min-microvolt = <1800000>;
    		regulator-max-microvolt = <1800000>;
    	};
    
    	vmmcsd_fixed: fixedregulator-mmcsd {
    		compatible = "regulator-fixed";
    		regulator-name = "vmmcsd_fixed";
    		regulator-min-microvolt = <3000000>;
    		regulator-max-microvolt = <3000000>;
    	};
    
    	mmc3_pwrseq: sdhci0_pwrseq {
    		compatible = "mmc-pwrseq-simple";
    		clocks = <&clk32kgaudio>;
    		clock-names = "ext_clock";
    	};
    
    	vmmcsdio_fixed: fixedregulator-mmcsdio {
    		compatible = "regulator-fixed";
    		regulator-name = "vmmcsdio_fixed";
    		regulator-min-microvolt = <1800000>;
    		regulator-max-microvolt = <1800000>;
    		gpio = <&gpio5 12 GPIO_ACTIVE_HIGH>;	/* gpio140 WLAN_EN */
    		enable-active-high;
    		startup-delay-us = <70000>;
    		pinctrl-names = "default";
    		pinctrl-0 = <&wlan_pins>;
    	};
    
    	/* HS USB Host PHY on PORT 2 */
    	hsusb2_phy: hsusb2_phy {
    		compatible = "usb-nop-xceiv";
    		reset-gpios = <&gpio3 16 GPIO_ACTIVE_LOW>; /* gpio3_80 HUB_NRESET */
    		clocks = <&auxclk1_ck>;
    		clock-names = "main_clk";
    		clock-frequency = <19200000>;
    	};
    
    	/* HS USB Host PHY on PORT 3 */
    	hsusb3_phy: hsusb3_phy {
    		compatible = "usb-nop-xceiv";
    		reset-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>; /* gpio3_79 ETH_NRESET */
    	};
    
    	tpd12s015: encoder {
    		compatible = "ti,tpd12s015";
    
    		pinctrl-names = "default";
    		pinctrl-0 = <&tpd12s015_pins>;
    
    		/* gpios defined in the board specific dts */
    
    		ports {
    			#address-cells = <1>;
    			#size-cells = <0>;
    
    			port@0 {
    				reg = <0>;
    
    				tpd12s015_in: endpoint {
    					remote-endpoint = <&hdmi_out>;
    				};
    			};
    
    			port@1 {
    				reg = <1>;
    
    				tpd12s015_out: endpoint {
    					remote-endpoint = <&hdmi_connector_in>;
    				};
    			};
    		};
    	};
    
    	hdmi0: connector {
    		compatible = "hdmi-connector";
    		label = "hdmi";
    
    		type = "b";
    
    		port {
    			hdmi_connector_in: endpoint {
    				remote-endpoint = <&tpd12s015_out>;
    			};
    		};
    	};
    
    	sound: sound {
    		compatible = "ti,abe-twl6040";
    		ti,model = "omap5-uevm";
    
    		ti,jack-detection;
    		ti,mclk-freq = <19200000>;
    
    		ti,mcpdm = <&mcpdm>;
    
    		ti,twl6040 = <&twl6040>;
    
    		/* Audio routing */
    		ti,audio-routing =
    			"Headset Stereophone", "HSOL",
    			"Headset Stereophone", "HSOR",
    			"Line Out", "AUXL",
    			"Line Out", "AUXR",
    			"HSMIC", "Headset Mic",
    			"Headset Mic", "Headset Mic Bias",
    			"AFML", "Line In",
    			"AFMR", "Line In";
    	};
    };
    
    &gpio8 {
    	/* TI trees use GPIO instead of msecure, see also muxing */
    	p234 {
    		gpio-hog;
    		gpios = <10 GPIO_ACTIVE_HIGH>;
    		output-high;
    		line-name = "gpio8_234/msecure";
    	};
    };
    
    &omap5_pmx_core {
    	pinctrl-names = "default";
    	pinctrl-0 = <
    			&usbhost_pins
    			&led_gpio_pins
    	>;
    
    	twl6040_pins: pinmux_twl6040_pins {
    		pinctrl-single,pins = <
    			OMAP5_IOPAD(0x1be, PIN_OUTPUT | MUX_MODE6)	/* mcspi1_somi.gpio5_141 */
    		>;
    	};
    
    	mcpdm_pins: pinmux_mcpdm_pins {
    		pinctrl-single,pins = <
    			OMAP5_IOPAD(0x182, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* abe_clks.abe_clks */
    			OMAP5_IOPAD(0x19c, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* abemcpdm_ul_data.abemcpdm_ul_data */
    			OMAP5_IOPAD(0x19e, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* abemcpdm_dl_data.abemcpdm_dl_data */
    			OMAP5_IOPAD(0x1a0, PIN_INPUT_PULLUP | MUX_MODE0)	/* abemcpdm_frame.abemcpdm_frame */
    			OMAP5_IOPAD(0x1a2, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* abemcpdm_lb_clk.abemcpdm_lb_clk */
    		>;
    	};
    
    	mcbsp1_pins: pinmux_mcbsp1_pins {
    		pinctrl-single,pins = <
    			OMAP5_IOPAD(0x18c, PIN_INPUT | MUX_MODE1)		/* abedmic_clk2.abemcbsp1_fsx */
    			OMAP5_IOPAD(0x18e, PIN_OUTPUT_PULLDOWN | MUX_MODE1)	/* abedmic_clk3.abemcbsp1_dx */
    			OMAP5_IOPAD(0x190, PIN_INPUT | MUX_MODE1)		/* abeslimbus1_clock.abemcbsp1_clkx */
    			OMAP5_IOPAD(0x192, PIN_INPUT_PULLDOWN | MUX_MODE1)	/* abeslimbus1_data.abemcbsp1_dr */
    		>;
    	};
    
    	mcbsp2_pins: pinmux_mcbsp2_pins {
    		pinctrl-single,pins = <
    			OMAP5_IOPAD(0x194, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* abemcbsp2_dr.abemcbsp2_dr */
    			OMAP5_IOPAD(0x196, PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* abemcbsp2_dx.abemcbsp2_dx */
    			OMAP5_IOPAD(0x198, PIN_INPUT | MUX_MODE0)		/* abemcbsp2_fsx.abemcbsp2_fsx */
    			OMAP5_IOPAD(0x19a, PIN_INPUT | MUX_MODE0)		/* abemcbsp2_clkx.abemcbsp2_clkx */
    		>;
    	};
    
    	i2c1_pins: pinmux_i2c1_pins {
    		pinctrl-single,pins = <
    			OMAP5_IOPAD(0x1f2, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c1_scl */
    			OMAP5_IOPAD(0x1f4, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c1_sda */
    		>;
    	};
    	
    	i2c3_pins: pinmux_i2c3_pins {
    		pinctrl-single,pins = <
    			OMAP5_IOPAD(0x17A, PIN_INPUT | MUX_MODE0)		/* i2c3_scl */
    			OMAP5_IOPAD(0x17C, PIN_INPUT | MUX_MODE0)		/* i2c3_sda */
    			
    			OMAP5_IOPAD(0x170, PIN_OUTPUT | MUX_MODE6)		/* gpio8_226.reset */
    			OMAP5_IOPAD(0x16C, PIN_OUTPUT | MUX_MODE6)		/* gpio8_224.shutter */
    			OMAP5_IOPAD(0x16E, PIN_OUTPUT | MUX_MODE6)		/* gpio8_225.strobe */
    			OMAP5_IOPAD(0x056, PIN_OUTPUT | MUX_MODE6)		/* gpio1_wk13.shutdowm */
    			
    		>;
    	};
    	
    	
    	
    	iss_csi21_pins: pinmux_iss_csi21_pins {
    		pinctrl-single,pins = <
    			OMAP5_IOPAD(0x158, PIN_INPUT | MUX_MODE0)		/* csiporta_lane0x */
    			OMAP5_IOPAD(0x15A, PIN_INPUT | MUX_MODE0)		/* csiporta_lane0y */
    			OMAP5_IOPAD(0x15E, PIN_INPUT | MUX_MODE0)		/* csiporta_lane1x */
    			OMAP5_IOPAD(0x15C, PIN_INPUT | MUX_MODE0)		/* csiporta_lane1y */
    			OMAP5_IOPAD(0x168, PIN_INPUT | MUX_MODE0)		/* csiporta_lane4x */
    			OMAP5_IOPAD(0x16A, PIN_INPUT | MUX_MODE0)		/* csiporta_lane4y */
    		>;
    	};
    
    
    	mcspi2_pins: pinmux_mcspi2_pins {
    		pinctrl-single,pins = <
    			OMAP5_IOPAD(0x0fc, PIN_INPUT | MUX_MODE0)		/*  mcspi2_clk */
    			OMAP5_IOPAD(0x0fe, PIN_INPUT | MUX_MODE0)		/*  mcspi2_simo */
    			OMAP5_IOPAD(0x100, PIN_INPUT_PULLUP | MUX_MODE0)	/*  mcspi2_somi */
    			OMAP5_IOPAD(0x102, PIN_OUTPUT | MUX_MODE0)		/*  mcspi2_cs0 */
    		>;
    	};
    
    	mcspi3_pins: pinmux_mcspi3_pins {
    		pinctrl-single,pins = <
    			OMAP5_IOPAD(0x0b8, PIN_INPUT | MUX_MODE1)		/*  mcspi3_somi */
    			OMAP5_IOPAD(0x0ba, PIN_INPUT | MUX_MODE1)		/*  mcspi3_cs0 */
    			OMAP5_IOPAD(0x0bc, PIN_INPUT | MUX_MODE1)		/*  mcspi3_simo */
    			OMAP5_IOPAD(0x0be, PIN_INPUT | MUX_MODE1)		/*  mcspi3_clk */
    		>;
    	};
    
    	mmc3_pins: pinmux_mmc3_pins {
    		pinctrl-single,pins = <
    			OMAP5_IOPAD(0x01a4, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_clk */
    			OMAP5_IOPAD(0x01a6, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_cmd */
    			OMAP5_IOPAD(0x01a8, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_data0 */
    			OMAP5_IOPAD(0x01aa, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_data1 */
    			OMAP5_IOPAD(0x01ac, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_data2 */
    			OMAP5_IOPAD(0x01ae, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_data3 */
    		>;
    	};
    
    	wlan_pins: pinmux_wlan_pins {
    		pinctrl-single,pins = <
    			OMAP5_IOPAD(0x1bc, PIN_OUTPUT | MUX_MODE6) /* mcspi1_clk.gpio5_140 */
    		>;
    	};
    
    	/* TI trees use GPIO mode; msecure mode does not work reliably? */
    	palmas_msecure_pins: palmas_msecure_pins {
    		pinctrl-single,pins = <
    			OMAP5_IOPAD(0x180, PIN_OUTPUT | MUX_MODE6) /* gpio8_234 */
    		>;
    	};
    
    	usbhost_pins: pinmux_usbhost_pins {
    		pinctrl-single,pins = <
    			OMAP5_IOPAD(0x0c4, PIN_INPUT | MUX_MODE0) /* usbb2_hsic_strobe */
    			OMAP5_IOPAD(0x0c6, PIN_INPUT | MUX_MODE0) /* usbb2_hsic_data */
    
    			OMAP5_IOPAD(0x1de, PIN_INPUT | MUX_MODE0) /* usbb3_hsic_strobe */
    			OMAP5_IOPAD(0x1e0, PIN_INPUT | MUX_MODE0) /* usbb3_hsic_data */
    
    			OMAP5_IOPAD(0x0b0, PIN_OUTPUT | MUX_MODE6) /* gpio3_80 HUB_NRESET */
    			OMAP5_IOPAD(0x0ae, PIN_OUTPUT | MUX_MODE6) /* gpio3_79 ETH_NRESET */
    		>;
    	};
    
    	led_gpio_pins: pinmux_led_gpio_pins {
    		pinctrl-single,pins = <
    			OMAP5_IOPAD(0x1d6, PIN_OUTPUT | MUX_MODE6) /* uart3_cts_rctx.gpio5_153 */
    		>;
    	};
    
    	uart1_pins: pinmux_uart1_pins {
    		pinctrl-single,pins = <
    			OMAP5_IOPAD(0x0a0, PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_cts */
    			OMAP5_IOPAD(0x0a2, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_tx.uart1_cts */
    			OMAP5_IOPAD(0x0a4, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rx.uart1_rts */
    			OMAP5_IOPAD(0x0a6, PIN_OUTPUT | MUX_MODE0) /* uart1_rx.uart1_rts */
    		>;
    	};
    
    	uart3_pins: pinmux_uart3_pins {
    		pinctrl-single,pins = <
    			OMAP5_IOPAD(0x1da, PIN_OUTPUT | MUX_MODE0) /* uart3_rts_irsd.uart3_tx_irtx */
    			OMAP5_IOPAD(0x1dc, PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_rx_irrx.uart3_usbb3_hsic */
    		>;
    	};
    
    	uart5_pins: pinmux_uart5_pins {
    		pinctrl-single,pins = <
    			OMAP5_IOPAD(0x1b0, PIN_INPUT_PULLUP | MUX_MODE0) /* uart5_rx.uart5_rx */
    			OMAP5_IOPAD(0x1b2, PIN_OUTPUT | MUX_MODE0) /* uart5_tx.uart5_tx */
    			OMAP5_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE0) /* uart5_cts.uart5_rts */
    			OMAP5_IOPAD(0x1b6, PIN_OUTPUT | MUX_MODE0) /* uart5_cts.uart5_rts */
    		>;
    	};
    
    	dss_hdmi_pins: pinmux_dss_hdmi_pins {
    		pinctrl-single,pins = <
    			OMAP5_IOPAD(0x13c, PIN_INPUT_PULLUP | MUX_MODE0)	/* hdmi_cec.hdmi_cec */
    			OMAP5_IOPAD(0x140, PIN_INPUT | MUX_MODE0)	/* hdmi_ddc_scl.hdmi_ddc_scl */
    			OMAP5_IOPAD(0x142, PIN_INPUT | MUX_MODE0)	/* hdmi_ddc_sda.hdmi_ddc_sda */
    		>;
    	};
    
    	tpd12s015_pins: pinmux_tpd12s015_pins {
    		pinctrl-single,pins = <
    			OMAP5_IOPAD(0x13e, PIN_INPUT_PULLDOWN | MUX_MODE6)	/* hdmi_hpd.gpio7_193 */
    		>;
    	};
    };
    
    &omap5_pmx_wkup {
    	pinctrl-names = "default";
    	pinctrl-0 = <
    			&usbhost_wkup_pins
    	>;
    
    	palmas_sys_nirq_pins: pinmux_palmas_sys_nirq_pins {
    		pinctrl-single,pins = <
    			OMAP5_IOPAD(0x068, PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1 */
    		>;
    	};
    
    	usbhost_wkup_pins: pinmux_usbhost_wkup_pins {
    		pinctrl-single,pins = <
    			OMAP5_IOPAD(0x05a, PIN_OUTPUT | MUX_MODE0) /* fref_clk1_out, USB hub clk */
    		>;
    	};
    
    	wlcore_irq_pin: pinmux_wlcore_irq_pin {
    		pinctrl-single,pins = <
    			OMAP5_IOPAD(0x40, PIN_INPUT | MUX_MODE6)	/* llia_wakereqin.gpio1_wk14 */
    		>;
    	};
    };
    
    &mmc1 {
    	vmmc-supply = <&ldo9_reg>;
    	bus-width = <4>;
    };
    
    &mmc2 {
    	vmmc-supply = <&vmmcsd_fixed>;
    	bus-width = <8>;
    	ti,non-removable;
    };
    
    &mmc3 {
    	vmmc-supply = <&vmmcsdio_fixed>;
    	mmc-pwrseq = <&mmc3_pwrseq>;
    	bus-width = <4>;
    	non-removable;
    	cap-power-off-card;
    	pinctrl-names = "default";
    	pinctrl-0 = <&mmc3_pins>;
    	interrupts-extended = <&wakeupgen GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH
    			       &omap5_pmx_core 0x16a>;
    
    	#address-cells = <1>;
    	#size-cells = <0>;
    	wlcore: wlcore@2 {
    		compatible = "ti,wl1271";
    		reg = <2>;
    		pinctrl-names = "default";
    		pinctrl-0 = <&wlcore_irq_pin>;
    		interrupt-parent = <&gpio1>;
    		interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;	/* gpio 14 */
    		ref-clock-frequency = <26000000>;
    	};
    };
    
    &mmc4 {
    	status = "disabled";
    };
    
    &mmc5 {
    	status = "disabled";
    };
    
    &i2c1 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&i2c1_pins>;
    
    	clock-frequency = <400000>;
    
    	palmas: palmas@48 {
    		compatible = "ti,palmas";
    		interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
    		reg = <0x48>;
    		interrupt-controller;
    		#interrupt-cells = <2>;
    		ti,system-power-controller;
    		ti,mux-pad1 = <0xa1>;
    		ti,mux-pad2 = <0x1b>;
    		pinctrl-names = "default";
    		pinctrl-0 = <&palmas_sys_nirq_pins &palmas_msecure_pins>;
    
    		palmas_gpio: gpio {
    			compatible = "ti,palmas-gpio";
    			gpio-controller;
    			#gpio-cells = <2>;
    		};
    
    		extcon_usb3: palmas_usb {
    			compatible = "ti,palmas-usb-vid";
    			ti,enable-vbus-detection;
    			ti,enable-id-detection;
    			ti,wakeup;
    			id-gpios = <&palmas_gpio 0 GPIO_ACTIVE_HIGH>;
    		};
    
    		clk32kgaudio: palmas_clk32k@1 {
    			compatible = "ti,palmas-clk32kgaudio";
    			#clock-cells = <0>;
    		};
    
    		rtc {
    			compatible = "ti,palmas-rtc";
    			interrupt-parent = <&palmas>;
    			interrupts = <8 IRQ_TYPE_NONE>;
    			ti,backup-battery-chargeable;
    			ti,backup-battery-charge-high-current;
    		};
    
    		gpadc: gpadc {
    			compatible = "ti,palmas-gpadc";
    			interrupts = <18 0
    				      16 0
    				      17 0>;
    			#io-channel-cells = <1>;
    			ti,channel0-current-microamp = <5>;
    			ti,channel3-current-microamp = <10>;
    		};
    
    		palmas_pmic {
    			compatible = "ti,palmas-pmic";
    			interrupt-parent = <&palmas>;
    			interrupts = <14 IRQ_TYPE_NONE>;
    			interrupt-names = "short-irq";
    
    			ti,ldo6-vibrator;
    
    			smps123-in-supply = <&vsys_cobra>;
    			smps45-in-supply = <&vsys_cobra>;
    			smps6-in-supply = <&vsys_cobra>;
    			smps7-in-supply = <&vsys_cobra>;
    			smps8-in-supply = <&vsys_cobra>;
    			smps9-in-supply = <&vsys_cobra>;
    			smps10_out2-in-supply = <&vsys_cobra>;
    			smps10_out1-in-supply = <&vsys_cobra>;
    			ldo1-in-supply = <&vsys_cobra>;
    			ldo2-in-supply = <&vsys_cobra>;
    			ldo3-in-supply = <&vdds_1v8_main>;
    			ldo4-in-supply = <&vdds_1v8_main>;
    			ldo5-in-supply = <&vsys_cobra>;
    			ldo6-in-supply = <&vdds_1v8_main>;
    			ldo7-in-supply = <&vsys_cobra>;
    			ldo8-in-supply = <&vsys_cobra>;
    			ldo9-in-supply = <&vmmcsd_fixed>;
    			ldoln-in-supply = <&vsys_cobra>;
    			ldousb-in-supply = <&vsys_cobra>;
    
    			regulators {
    				smps123_reg: smps123 {
    					/* VDD_OPP_MPU */
    					regulator-name = "smps123";
    					regulator-min-microvolt = < 600000>;
    					regulator-max-microvolt = <1500000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				smps45_reg: smps45 {
    					/* VDD_OPP_MM */
    					regulator-name = "smps45";
    					regulator-min-microvolt = < 600000>;
    					regulator-max-microvolt = <1310000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				smps6_reg: smps6 {
    					/* VDD_DDR3 - over VDD_SMPS6 */
    					regulator-name = "smps6";
    					regulator-min-microvolt = <1350000>;
    					regulator-max-microvolt = <1350000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				smps7_reg: smps7 {
    					/* VDDS_1v8_OMAP over VDDS_1v8_MAIN */
    					regulator-name = "smps7";
    					regulator-min-microvolt = <1800000>;
    					regulator-max-microvolt = <1800000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				smps8_reg: smps8 {
    					/* VDD_OPP_CORE */
    					regulator-name = "smps8";
    					regulator-min-microvolt = < 600000>;
    					regulator-max-microvolt = <1310000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				smps9_reg: smps9 {
    					/* VDDA_2v1_AUD over VDD_2v1 */
    					regulator-name = "smps9";
    					regulator-min-microvolt = <2100000>;
    					regulator-max-microvolt = <2100000>;
    					ti,smps-range = <0x80>;
    				};
    
    				smps10_out2_reg: smps10_out2 {
    					/* VBUS_5V_OTG */
    					regulator-name = "smps10_out2";
    					regulator-min-microvolt = <5000000>;
    					regulator-max-microvolt = <5000000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				smps10_out1_reg: smps10_out1 {
    					/* VBUS_5V_OTG */
    					regulator-name = "smps10_out1";
    					regulator-min-microvolt = <5000000>;
    					regulator-max-microvolt = <5000000>;
    				};
    
    				ldo1_reg: ldo1 {
    					/* VDDAPHY_CAM: vdda_csiport */
    					regulator-name = "ldo1";
    					regulator-min-microvolt = <1800000>;
    					regulator-max-microvolt = <1800000>;
    				};
    
    				ldo2_reg: ldo2 {
    					/* VCC_2V8_DISP: Does not go anywhere */
    					regulator-name = "ldo2";
    					regulator-min-microvolt = <2800000>;
    					regulator-max-microvolt = <2800000>;
    					/* Unused */
    					status = "disabled";
    				};
    
    				ldo3_reg: ldo3 {
    					/* VDDAPHY_MDM: vdda_lli */
    					regulator-name = "ldo3";
    					regulator-min-microvolt = <1500000>;
    					regulator-max-microvolt = <1500000>;
    					regulator-boot-on;
    					/* Only if Modem is used */
    					status = "disabled";
    				};
    
    				ldo4_reg: ldo4 {
    					/* VDDAPHY_DISP: vdda_dsiport/hdmi */
    					regulator-name = "ldo4";
    					regulator-min-microvolt = <1800000>;
    					regulator-max-microvolt = <1800000>;
    				};
    
    				ldo5_reg: ldo5 {
    					/* VDDA_1V8_PHY: usb/sata/hdmi.. */
    					regulator-name = "ldo5";
    					regulator-min-microvolt = <1800000>;
    					regulator-max-microvolt = <1800000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				ldo6_reg: ldo6 {
    					/* VDDS_1V2_WKUP: hsic/ldo_emu_wkup */
    					regulator-name = "ldo6";
    					regulator-min-microvolt = <1200000>;
    					regulator-max-microvolt = <1200000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				ldo7_reg: ldo7 {
    					/* VDD_VPP: vpp1 */
    					regulator-name = "ldo7";
    					regulator-min-microvolt = <2000000>;
    					regulator-max-microvolt = <2000000>;
    					/* Only for efuse reprograming! */
    					status = "disabled";
    				};
    
    				ldo8_reg: ldo8 {
    					/* VDD_3v0: Does not go anywhere */
    					regulator-name = "ldo8";
    					regulator-min-microvolt = <3000000>;
    					regulator-max-microvolt = <3000000>;
    					regulator-boot-on;
    					/* Unused */
    					status = "disabled";
    				};
    
    				ldo9_reg: ldo9 {
    					/* VCC_DV_SDIO: vdds_sdcard */
    					regulator-name = "ldo9";
    					regulator-min-microvolt = <1800000>;
    					regulator-max-microvolt = <3000000>;
    					regulator-boot-on;
    				};
    
    				ldoln_reg: ldoln {
    					/* VDDA_1v8_REF: vdds_osc/mm_l4per.. */
    					regulator-name = "ldoln";
    					regulator-min-microvolt = <1800000>;
    					regulator-max-microvolt = <1800000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				ldousb_reg: ldousb {
    					/* VDDA_3V_USB: VDDA_USBHS33 */
    					regulator-name = "ldousb";
    					regulator-min-microvolt = <3250000>;
    					regulator-max-microvolt = <3250000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				regen3_reg: regen3 {
    					/* REGEN3 controls LDO9 supply to card */
    					regulator-name = "regen3";
    					regulator-always-on;
    					regulator-boot-on;
    				};
    			};
    		};
    
    		palmas_power_button: palmas_power_button {
    			compatible = "ti,palmas-pwrbutton";
    			interrupt-parent = <&palmas>;
    			interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
    			wakeup-source;
    		};
    	};
    
    	twl6040: twl@4b {
    		compatible = "ti,twl6040";
    		#clock-cells = <0>;
    		reg = <0x4b>;
    
    		pinctrl-names = "default";
    		pinctrl-0 = <&twl6040_pins>;
    
    		interrupts = <GIC_SPI 119 IRQ_TYPE_NONE>; /* IRQ_SYS_2N cascaded to gic */
    
    		/* audpwron gpio defined in the board specific dts */
    
    		vio-supply = <&smps7_reg>;
    		v2v1-supply = <&smps9_reg>;
    		enable-active-high;
    
    		clocks = <&clk32kgaudio>;
    		clock-names = "clk32k";
    	};
    };
    
    &mcpdm {
    	pinctrl-names = "default";
    	pinctrl-0 = <&mcpdm_pins>;
    
    	clocks = <&twl6040>;
    	clock-names = "pdmclk";
    
    	status = "okay";
    };
    
    &mcbsp1 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&mcbsp1_pins>;
    	status = "okay";
    };
    
    &mcbsp2 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&mcbsp2_pins>;
    	status = "okay";
    };
    
    &usbhshost {
    	port2-mode = "ehci-hsic";
    	port3-mode = "ehci-hsic";
    };
    
    &usbhsehci {
    	phys = <0 &hsusb2_phy &hsusb3_phy>;
    };
    
    &usb3 {
    	extcon = <&extcon_usb3>;
    	vbus-supply = <&smps10_out1_reg>;
    };
    
    &mcspi1 {
    
    };
    
    &mcspi2 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&mcspi2_pins>;
    };
    
    &mcspi3 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&mcspi3_pins>;
    };
    
    &uart1 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&uart1_pins>;
    };
    
    &uart3 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&uart3_pins>;
    	interrupts-extended = <&wakeupgen GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
    			      <&omap5_pmx_core 0x19c>;
    };
    
    &uart5 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&uart5_pins>;
    };
    
    &cpu0 {
    	cpu0-supply = <&smps123_reg>;
    };
    
    &dss {
    	status = "ok";
    };
    
    &hdmi {
    	status = "ok";
    
    	/* vdda-supply populated in board specific dts file */
    
    	pinctrl-names = "default";
    	pinctrl-0 = <&dss_hdmi_pins>;
    
    	port {
    		hdmi_out: endpoint {
    			remote-endpoint = <&tpd12s015_in>;
    		};
    	};
    };
    
    &i2c3 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&i2c3_pins>;
    	status = "ok";
    
    	clock-frequency = <100000>;
    
    	ov5640_1_camera: camera@3c {
    		compatible = "omnivision,ov5640";
    		status = "ok";
    		reg = <0x3c>;
    
    		pwdn-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;	// gpio1_13 - power down
    		reset-gpios = <&gpio8 2 GPIO_ACTIVE_LOW>;	// gpio8_226 - reset
    
    		clocks = <&auxclk1_ck>;
    		
    		port {
    			ov5640_1_cam_ep: endpoint {
    				clock-lanes = <4>;
    				data-lanes = <0 1>;
    				remote-endpoint = <&csi2a_ep>;
    			};
    		};
    	};
    };
    
    
    &iss {
        status = "ok";
    
        pinctrl-names = "default";
        pinctrl-0 = <&iss_csi21_pins>;
    
        ports {
            port@0 {
                reg = <0>;
                csi2a_ep: endpoint {
                    remote-endpoint = <&ov5640_1_cam_ep>;
                    clock-lanes = <4>;
                    data-lanes = <0 1>;
                    crc = <0>;
                    lane-polarities = <0 0 0>;
                };
            };
        };
    };
    
    omap5_dtsi.txt
    /*
     * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
     *
     * This program is free software; you can redistribute it and/or modify
     * it under the terms of the GNU General Public License version 2 as
     * published by the Free Software Foundation.
     * Based on "omap4.dtsi"
     */
    
    #include <dt-bindings/gpio/gpio.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/pinctrl/omap.h>
    
    / {
    	#address-cells = <2>;
    	#size-cells = <2>;
    
    	compatible = "ti,omap5";
    	interrupt-parent = <&wakeupgen>;
    	chosen { };
    
    	aliases {
    		i2c0 = &i2c1;
    		i2c1 = &i2c2;
    		i2c2 = &i2c3;
    		i2c3 = &i2c4;
    		i2c4 = &i2c5;
    		serial0 = &uart1;
    		serial1 = &uart2;
    		serial2 = &uart3;
    		serial3 = &uart4;
    		serial4 = &uart5;
    		serial5 = &uart6;
    	};
    
    	cpus {
    		#address-cells = <1>;
    		#size-cells = <0>;
    
    		cpu0: cpu@0 {
    			device_type = "cpu";
    			compatible = "arm,cortex-a15";
    			reg = <0x0>;
    
    			operating-points = <
    				/* kHz    uV */
    				1000000 1060000
    				1500000 1250000
    			>;
    
    			clocks = <&dpll_mpu_ck>;
    			clock-names = "cpu";
    
    			clock-latency = <300000>; /* From omap-cpufreq driver */
    
    			/* cooling options */
    			cooling-min-level = <0>;
    			cooling-max-level = <2>;
    			#cooling-cells = <2>; /* min followed by max */
    		};
    		cpu@1 {
    			device_type = "cpu";
    			compatible = "arm,cortex-a15";
    			reg = <0x1>;
    		};
    	};
    
    	thermal-zones {
    		#include "omap4-cpu-thermal.dtsi"
    		#include "omap5-gpu-thermal.dtsi"
    		#include "omap5-core-thermal.dtsi"
    	};
    
    	timer {
    		compatible = "arm,armv7-timer";
    		/* PPI secure/nonsecure IRQ */
    		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_LOW)>,
    			     <GIC_PPI 14 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_LOW)>,
    			     <GIC_PPI 11 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_LOW)>,
    			     <GIC_PPI 10 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_LOW)>;
    		interrupt-parent = <&gic>;
    	};
    
    	pmu {
    		compatible = "arm,cortex-a15-pmu";
    		interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
    			     <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
    	};
    
    	gic: interrupt-controller@48211000 {
    		compatible = "arm,cortex-a15-gic";
    		interrupt-controller;
    		#interrupt-cells = <3>;
    		reg = <0 0x48211000 0 0x1000>,
    		      <0 0x48212000 0 0x1000>,
    		      <0 0x48214000 0 0x2000>,
    		      <0 0x48216000 0 0x2000>;
    		interrupt-parent = <&gic>;
    	};
    
    	wakeupgen: interrupt-controller@48281000 {
    		compatible = "ti,omap5-wugen-mpu", "ti,omap4-wugen-mpu";
    		interrupt-controller;
    		#interrupt-cells = <3>;
    		reg = <0 0x48281000 0 0x1000>;
    		interrupt-parent = <&gic>;
    	};
    
    	/*
    	 * The soc node represents the soc top level view. It is used for IPs
    	 * that are not memory mapped in the MPU view or for the MPU itself.
    	 */
    	soc {
    		compatible = "ti,omap-infra";
    		mpu {
    			compatible = "ti,omap4-mpu";
    			ti,hwmods = "mpu";
    			sram = <&ocmcram>;
    		};
    	};
    
    	/*
    	 * XXX: Use a flat representation of the OMAP3 interconnect.
    	 * The real OMAP interconnect network is quite complex.
    	 * Since it will not bring real advantage to represent that in DT for
    	 * the moment, just use a fake OCP bus entry to represent the whole bus
    	 * hierarchy.
    	 */
    	ocp {
    		compatible = "ti,omap5-l3-noc", "simple-bus";
    		#address-cells = <1>;
    		#size-cells = <1>;
    		ranges = <0 0 0 0xc0000000>;
    		ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
    		reg = <0 0x44000000 0 0x2000>,
    		      <0 0x44800000 0 0x3000>,
    		      <0 0x45000000 0 0x4000>;
    		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
    			     <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
    
    		l4_cfg: l4@4a000000 {
    			compatible = "ti,omap5-l4-cfg", "simple-bus";
    			#address-cells = <1>;
    			#size-cells = <1>;
    			ranges = <0 0x4a000000 0x22a000>;
    
    			scm_core: scm@2000 {
    				compatible = "ti,omap5-scm-core", "simple-bus";
    				reg = <0x2000 0x1000>;
    				#address-cells = <1>;
    				#size-cells = <1>;
    				ranges = <0 0x2000 0x800>;
    
    				scm_conf: scm_conf@0 {
    					compatible = "syscon";
    					reg = <0x0 0x800>;
    					#address-cells = <1>;
    					#size-cells = <1>;
    				};
    			};
    
    			scm_padconf_core: scm@2800 {
    				compatible = "ti,omap5-scm-padconf-core",
    					     "simple-bus";
    				#address-cells = <1>;
    				#size-cells = <1>;
    				ranges = <0 0x2800 0x800>;
    
    				omap5_pmx_core: pinmux@40 {
    					compatible = "ti,omap5-padconf",
    						     "pinctrl-single";
    					reg = <0x40 0x01b6>;
    					#address-cells = <1>;
    					#size-cells = <0>;
    					#interrupt-cells = <1>;
    					interrupt-controller;
    					pinctrl-single,register-width = <16>;
    					pinctrl-single,function-mask = <0x7fff>;
    				};
    
    				omap5_padconf_global: omap5_padconf_global@5a0 {
    					compatible = "syscon",
    						     "simple-bus";
    					reg = <0x5a0 0xec>;
    					#address-cells = <1>;
    					#size-cells = <1>;
    					ranges = <0 0x5a0 0xec>;
    
    					pbias_regulator: pbias_regulator@60 {
    						compatible = "ti,pbias-omap5", "ti,pbias-omap";
    						reg = <0x60 0x4>;
    						syscon = <&omap5_padconf_global>;
    						pbias_mmc_reg: pbias_mmc_omap5 {
    							regulator-name = "pbias_mmc_omap5";
    							regulator-min-microvolt = <1800000>;
    							regulator-max-microvolt = <3000000>;
    						};
    					};
    				};
    			};
    
    			cm_core_aon: cm_core_aon@4000 {
    				compatible = "ti,omap5-cm-core-aon";
    				reg = <0x4000 0x2000>;
    
    				cm_core_aon_clocks: clocks {
    					#address-cells = <1>;
    					#size-cells = <0>;
    				};
    
    				cm_core_aon_clockdomains: clockdomains {
    				};
    			};
    
    			cm_core: cm_core@8000 {
    				compatible = "ti,omap5-cm-core";
    				reg = <0x8000 0x3000>;
    
    				cm_core_clocks: clocks {
    					#address-cells = <1>;
    					#size-cells = <0>;
    				};
    
    				cm_core_clockdomains: clockdomains {
    				};
    			};
    		};
    
    		l4_wkup: l4@4ae00000 {
    			compatible = "ti,omap5-l4-wkup", "simple-bus";
    			#address-cells = <1>;
    			#size-cells = <1>;
    			ranges = <0 0x4ae00000 0x2b000>;
    
    			counter32k: counter@4000 {
    				compatible = "ti,omap-counter32k";
    				reg = <0x4000 0x40>;
    				ti,hwmods = "counter_32k";
    			};
    
    			prm: prm@6000 {
    				compatible = "ti,omap5-prm";
    				reg = <0x6000 0x3000>;
    				interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
    
    				prm_clocks: clocks {
    					#address-cells = <1>;
    					#size-cells = <0>;
    				};
    
    				prm_clockdomains: clockdomains {
    				};
    			};
    
    			scrm: scrm@a000 {
    				compatible = "ti,omap5-scrm";
    				reg = <0xa000 0x2000>;
    
    				scrm_clocks: clocks {
    					#address-cells = <1>;
    					#size-cells = <0>;
    				};
    
    				scrm_clockdomains: clockdomains {
    				};
    			};
    
    			omap5_pmx_wkup: pinmux@c840 {
    				compatible = "ti,omap5-padconf",
    					     "pinctrl-single";
    				reg = <0xc840 0x003c>;
    				#address-cells = <1>;
    				#size-cells = <0>;
    				#interrupt-cells = <1>;
    				interrupt-controller;
    				pinctrl-single,register-width = <16>;
    				pinctrl-single,function-mask = <0x7fff>;
    			};
    		};
    
    		ocmcram: ocmcram@40300000 {
    			compatible = "mmio-sram";
    			reg = <0x40300000 0x20000>; /* 128k */
    		};
    
    		sdma: dma-controller@4a056000 {
    			compatible = "ti,omap4430-sdma";
    			reg = <0x4a056000 0x1000>;
    			interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
    				     <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
    				     <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
    				     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
    			#dma-cells = <1>;
    			dma-channels = <32>;
    			dma-requests = <127>;
    		};
    
    		gpio1: gpio@4ae10000 {
    			compatible = "ti,omap4-gpio";
    			reg = <0x4ae10000 0x200>;
    			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "gpio1";
    			ti,gpio-always-on;
    			gpio-controller;
    			#gpio-cells = <2>;
    			interrupt-controller;
    			#interrupt-cells = <2>;
    		};
    
    		gpio2: gpio@48055000 {
    			compatible = "ti,omap4-gpio";
    			reg = <0x48055000 0x200>;
    			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "gpio2";
    			gpio-controller;
    			#gpio-cells = <2>;
    			interrupt-controller;
    			#interrupt-cells = <2>;
    		};
    
    		gpio3: gpio@48057000 {
    			compatible = "ti,omap4-gpio";
    			reg = <0x48057000 0x200>;
    			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "gpio3";
    			gpio-controller;
    			#gpio-cells = <2>;
    			interrupt-controller;
    			#interrupt-cells = <2>;
    		};
    
    		gpio4: gpio@48059000 {
    			compatible = "ti,omap4-gpio";
    			reg = <0x48059000 0x200>;
    			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "gpio4";
    			gpio-controller;
    			#gpio-cells = <2>;
    			interrupt-controller;
    			#interrupt-cells = <2>;
    		};
    
    		gpio5: gpio@4805b000 {
    			compatible = "ti,omap4-gpio";
    			reg = <0x4805b000 0x200>;
    			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "gpio5";
    			gpio-controller;
    			#gpio-cells = <2>;
    			interrupt-controller;
    			#interrupt-cells = <2>;
    		};
    
    		gpio6: gpio@4805d000 {
    			compatible = "ti,omap4-gpio";
    			reg = <0x4805d000 0x200>;
    			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "gpio6";
    			gpio-controller;
    			#gpio-cells = <2>;
    			interrupt-controller;
    			#interrupt-cells = <2>;
    		};
    
    		gpio7: gpio@48051000 {
    			compatible = "ti,omap4-gpio";
    			reg = <0x48051000 0x200>;
    			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "gpio7";
    			gpio-controller;
    			#gpio-cells = <2>;
    			interrupt-controller;
    			#interrupt-cells = <2>;
    		};
    
    		gpio8: gpio@48053000 {
    			compatible = "ti,omap4-gpio";
    			reg = <0x48053000 0x200>;
    			interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "gpio8";
    			gpio-controller;
    			#gpio-cells = <2>;
    			interrupt-controller;
    			#interrupt-cells = <2>;
    		};
    
    		gpmc: gpmc@50000000 {
    			compatible = "ti,omap4430-gpmc";
    			reg = <0x50000000 0x1000>;
    			#address-cells = <2>;
    			#size-cells = <1>;
    			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
    			dmas = <&sdma 4>;
    			dma-names = "rxtx";
    			gpmc,num-cs = <8>;
    			gpmc,num-waitpins = <4>;
    			ti,hwmods = "gpmc";
    			clocks = <&l3_iclk_div>;
    			clock-names = "fck";
    			interrupt-controller;
    			#interrupt-cells = <2>;
    			gpio-controller;
    			#gpio-cells = <2>;
    		};
    
    		i2c1: i2c@48070000 {
    			compatible = "ti,omap4-i2c";
    			reg = <0x48070000 0x100>;
    			interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
    			#address-cells = <1>;
    			#size-cells = <0>;
    			ti,hwmods = "i2c1";
    		};
    
    		i2c2: i2c@48072000 {
    			compatible = "ti,omap4-i2c";
    			reg = <0x48072000 0x100>;
    			interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
    			#address-cells = <1>;
    			#size-cells = <0>;
    			ti,hwmods = "i2c2";
    		};
    
    		i2c3: i2c@48060000 {
    			compatible = "ti,omap4-i2c";
    			reg = <0x48060000 0x100>;
    			interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
    			#address-cells = <1>;
    			#size-cells = <0>;
    			ti,hwmods = "i2c3";
    		};
    
    		i2c4: i2c@4807a000 {
    			compatible = "ti,omap4-i2c";
    			reg = <0x4807a000 0x100>;
    			interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
    			#address-cells = <1>;
    			#size-cells = <0>;
    			ti,hwmods = "i2c4";
    		};
    	
    
    		i2c5: i2c@4807c000 {
    			compatible = "ti,omap4-i2c";
    			reg = <0x4807c000 0x100>;
    			interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
    			#address-cells = <1>;
    			#size-cells = <0>;
    			ti,hwmods = "i2c5";
    		};
    
    		hwspinlock: spinlock@4a0f6000 {
    			compatible = "ti,omap4-hwspinlock";
    			reg = <0x4a0f6000 0x1000>;
    			ti,hwmods = "spinlock";
    			#hwlock-cells = <1>;
    		};
    
    		mcspi1: spi@48098000 {
    			compatible = "ti,omap4-mcspi";
    			reg = <0x48098000 0x200>;
    			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
    			#address-cells = <1>;
    			#size-cells = <0>;
    			ti,hwmods = "mcspi1";
    			ti,spi-num-cs = <4>;
    			dmas = <&sdma 35>,
    			       <&sdma 36>,
    			       <&sdma 37>,
    			       <&sdma 38>,
    			       <&sdma 39>,
    			       <&sdma 40>,
    			       <&sdma 41>,
    			       <&sdma 42>;
    			dma-names = "tx0", "rx0", "tx1", "rx1",
    				    "tx2", "rx2", "tx3", "rx3";
    		};
    
    		mcspi2: spi@4809a000 {
    			compatible = "ti,omap4-mcspi";
    			reg = <0x4809a000 0x200>;
    			interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
    			#address-cells = <1>;
    			#size-cells = <0>;
    			ti,hwmods = "mcspi2";
    			ti,spi-num-cs = <2>;
    			dmas = <&sdma 43>,
    			       <&sdma 44>,
    			       <&sdma 45>,
    			       <&sdma 46>;
    			dma-names = "tx0", "rx0", "tx1", "rx1";
    		};
    
    		mcspi3: spi@480b8000 {
    			compatible = "ti,omap4-mcspi";
    			reg = <0x480b8000 0x200>;
    			interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
    			#address-cells = <1>;
    			#size-cells = <0>;
    			ti,hwmods = "mcspi3";
    			ti,spi-num-cs = <2>;
    			dmas = <&sdma 15>, <&sdma 16>;
    			dma-names = "tx0", "rx0";
    		};
    
    		mcspi4: spi@480ba000 {
    			compatible = "ti,omap4-mcspi";
    			reg = <0x480ba000 0x200>;
    			interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
    			#address-cells = <1>;
    			#size-cells = <0>;
    			ti,hwmods = "mcspi4";
    			ti,spi-num-cs = <1>;
    			dmas = <&sdma 70>, <&sdma 71>;
    			dma-names = "tx0", "rx0";
    		};
    
    		uart1: serial@4806a000 {
    			compatible = "ti,omap4-uart";
    			reg = <0x4806a000 0x100>;
    			interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "uart1";
    			clock-frequency = <48000000>;
    		};
    
    		uart2: serial@4806c000 {
    			compatible = "ti,omap4-uart";
    			reg = <0x4806c000 0x100>;
    			interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "uart2";
    			clock-frequency = <48000000>;
    		};
    
    		uart3: serial@48020000 {
    			compatible = "ti,omap4-uart";
    			reg = <0x48020000 0x100>;
    			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "uart3";
    			clock-frequency = <48000000>;
    		};
    
    		uart4: serial@4806e000 {
    			compatible = "ti,omap4-uart";
    			reg = <0x4806e000 0x100>;
    			interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "uart4";
    			clock-frequency = <48000000>;
    		};
    
    		uart5: serial@48066000 {
    			compatible = "ti,omap4-uart";
    			reg = <0x48066000 0x100>;
    			interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "uart5";
    			clock-frequency = <48000000>;
    		};
    
    		uart6: serial@48068000 {
    			compatible = "ti,omap4-uart";
    			reg = <0x48068000 0x100>;
    			interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "uart6";
    			clock-frequency = <48000000>;
    		};
    
    		mmc1: mmc@4809c000 {
    			compatible = "ti,omap4-hsmmc";
    			reg = <0x4809c000 0x400>;
    			interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "mmc1";
    			ti,dual-volt;
    			ti,needs-special-reset;
    			dmas = <&sdma 61>, <&sdma 62>;
    			dma-names = "tx", "rx";
    			pbias-supply = <&pbias_mmc_reg>;
    		};
    
    		mmc2: mmc@480b4000 {
    			compatible = "ti,omap4-hsmmc";
    			reg = <0x480b4000 0x400>;
    			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "mmc2";
    			ti,needs-special-reset;
    			dmas = <&sdma 47>, <&sdma 48>;
    			dma-names = "tx", "rx";
    		};
    
    		mmc3: mmc@480ad000 {
    			compatible = "ti,omap4-hsmmc";
    			reg = <0x480ad000 0x400>;
    			interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "mmc3";
    			ti,needs-special-reset;
    			dmas = <&sdma 77>, <&sdma 78>;
    			dma-names = "tx", "rx";
    		};
    
    		mmc4: mmc@480d1000 {
    			compatible = "ti,omap4-hsmmc";
    			reg = <0x480d1000 0x400>;
    			interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "mmc4";
    			ti,needs-special-reset;
    			dmas = <&sdma 57>, <&sdma 58>;
    			dma-names = "tx", "rx";
    		};
    
    		mmc5: mmc@480d5000 {
    			compatible = "ti,omap4-hsmmc";
    			reg = <0x480d5000 0x400>;
    			interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "mmc5";
    			ti,needs-special-reset;
    			dmas = <&sdma 59>, <&sdma 60>;
    			dma-names = "tx", "rx";
    		};
    
    		mmu_dsp: mmu@4a066000 {
    			compatible = "ti,omap4-iommu";
    			reg = <0x4a066000 0x100>;
    			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "mmu_dsp";
    			#iommu-cells = <0>;
    		};
    
    		iss: iss@52000000 {
    			compatible = "ti,omap4-iss";
    			reg = <0x52000000 0x100>, /* top */
    			      <0x52001000 0x170>, /* csi2_a_regs1 */
    			      <0x52001170 0x020>, /* camerarx_core1 */
    			      <0x52001400 0x170>, /* csi2_b_regs1 */
    			      <0x52001570 0x020>, /* camerarx_core2 */
    			      <0x52002000 0x200>, /* bte */
    			      <0x52010000 0x0a0>, /* isp_sys1 */
    			      <0x52010400 0x400>, /* isp_resizer */
    			      <0x52010800 0x800>, /* isp_ipipe */
    			      <0x52011000 0x200>, /* isp_isif */
    			      <0x52011200 0x080>; /* isp_ipipeif */
    			reg-names = "top",
    			            "csi2_a_regs1",
    			            "camerarx_core1",
    			            "csi2_b_regs1",
    			            "camerarx_core2",
    			            "bte",
    			            "isp_sys1",
    			            "isp_resizer",
    			            "isp_ipipe",
    			            "isp_isif",
    			            "isp_ipipeif";
    			status = "ok";
    			ti,hwmods = "iss";
    			interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
    			//clocks = <&ducati_clk_mux_ck>, <&iss_ctrlclk>;
    			clock-names = "iss_fck", "iss_ctrlclk";
    			dmas = <&sdma 9>, <&sdma 10>, <&sdma 12>, <&sdma 13>;
    			dma-names = "1", "2", "3", "4";
    
    		};
    
    		mmu_ipu: mmu@55082000 {
    			compatible = "ti,omap4-iommu";
    			reg = <0x55082000 0x100>;
    			interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "mmu_ipu";
    			#iommu-cells = <0>;
    			ti,iommu-bus-err-back;
    		};
    
    		keypad: keypad@4ae1c000 {
    			compatible = "ti,omap4-keypad";
    			reg = <0x4ae1c000 0x400>;
    			ti,hwmods = "kbd";
    		};
    
    		mcpdm: mcpdm@40132000 {
    			compatible = "ti,omap4-mcpdm";
    			reg = <0x40132000 0x7f>, /* MPU private access */
    			      <0x49032000 0x7f>; /* L3 Interconnect */
    			reg-names = "mpu", "dma";
    			interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "mcpdm";
    			dmas = <&sdma 65>,
    			       <&sdma 66>;
    			dma-names = "up_link", "dn_link";
    			status = "disabled";
    		};
    
    		dmic: dmic@4012e000 {
    			compatible = "ti,omap4-dmic";
    			reg = <0x4012e000 0x7f>, /* MPU private access */
    			      <0x4902e000 0x7f>; /* L3 Interconnect */
    			reg-names = "mpu", "dma";
    			interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "dmic";
    			dmas = <&sdma 67>;
    			dma-names = "up_link";
    			status = "disabled";
    		};
    
    		mcbsp1: mcbsp@40122000 {
    			compatible = "ti,omap4-mcbsp";
    			reg = <0x40122000 0xff>, /* MPU private access */
    			      <0x49022000 0xff>; /* L3 Interconnect */
    			reg-names = "mpu", "dma";
    			interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
    			interrupt-names = "common";
    			ti,buffer-size = <128>;
    			ti,hwmods = "mcbsp1";
    			dmas = <&sdma 33>,
    			       <&sdma 34>;
    			dma-names = "tx", "rx";
    			status = "disabled";
    		};
    
    		mcbsp2: mcbsp@40124000 {
    			compatible = "ti,omap4-mcbsp";
    			reg = <0x40124000 0xff>, /* MPU private access */
    			      <0x49024000 0xff>; /* L3 Interconnect */
    			reg-names = "mpu", "dma";
    			interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
    			interrupt-names = "common";
    			ti,buffer-size = <128>;
    			ti,hwmods = "mcbsp2";
    			dmas = <&sdma 17>,
    			       <&sdma 18>;
    			dma-names = "tx", "rx";
    			status = "disabled";
    		};
    
    		mcbsp3: mcbsp@40126000 {
    			compatible = "ti,omap4-mcbsp";
    			reg = <0x40126000 0xff>, /* MPU private access */
    			      <0x49026000 0xff>; /* L3 Interconnect */
    			reg-names = "mpu", "dma";
    			interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
    			interrupt-names = "common";
    			ti,buffer-size = <128>;
    			ti,hwmods = "mcbsp3";
    			dmas = <&sdma 19>,
    			       <&sdma 20>;
    			dma-names = "tx", "rx";
    			status = "disabled";
    		};
    
    		mailbox: mailbox@4a0f4000 {
    			compatible = "ti,omap4-mailbox";
    			reg = <0x4a0f4000 0x200>;
    			interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "mailbox";
    			#mbox-cells = <1>;
    			ti,mbox-num-users = <3>;
    			ti,mbox-num-fifos = <8>;
    			mbox_ipu: mbox_ipu {
    				ti,mbox-tx = <0 0 0>;
    				ti,mbox-rx = <1 0 0>;
    			};
    			mbox_dsp: mbox_dsp {
    				ti,mbox-tx = <3 0 0>;
    				ti,mbox-rx = <2 0 0>;
    			};
    		};
    
    		timer1: timer@4ae18000 {
    			compatible = "ti,omap5430-timer";
    			reg = <0x4ae18000 0x80>;
    			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "timer1";
    			ti,timer-alwon;
    		};
    
    		timer2: timer@48032000 {
    			compatible = "ti,omap5430-timer";
    			reg = <0x48032000 0x80>;
    			interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "timer2";
    		};
    
    		timer3: timer@48034000 {
    			compatible = "ti,omap5430-timer";
    			reg = <0x48034000 0x80>;
    			interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "timer3";
    		};
    
    		timer4: timer@48036000 {
    			compatible = "ti,omap5430-timer";
    			reg = <0x48036000 0x80>;
    			interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "timer4";
    		};
    
    		timer5: timer@40138000 {
    			compatible = "ti,omap5430-timer";
    			reg = <0x40138000 0x80>,
    			      <0x49038000 0x80>;
    			interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "timer5";
    			ti,timer-dsp;
    			ti,timer-pwm;
    		};
    
    		timer6: timer@4013a000 {
    			compatible = "ti,omap5430-timer";
    			reg = <0x4013a000 0x80>,
    			      <0x4903a000 0x80>;
    			interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "timer6";
    			ti,timer-dsp;
    			ti,timer-pwm;
    		};
    
    		timer7: timer@4013c000 {
    			compatible = "ti,omap5430-timer";
    			reg = <0x4013c000 0x80>,
    			      <0x4903c000 0x80>;
    			interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "timer7";
    			ti,timer-dsp;
    		};
    
    		timer8: timer@4013e000 {
    			compatible = "ti,omap5430-timer";
    			reg = <0x4013e000 0x80>,
    			      <0x4903e000 0x80>;
    			interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "timer8";
    			ti,timer-dsp;
    			ti,timer-pwm;
    		};
    
    		timer9: timer@4803e000 {
    			compatible = "ti,omap5430-timer";
    			reg = <0x4803e000 0x80>;
    			interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "timer9";
    			ti,timer-pwm;
    		};
    
    		timer10: timer@48086000 {
    			compatible = "ti,omap5430-timer";
    			reg = <0x48086000 0x80>;
    			interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "timer10";
    			ti,timer-pwm;
    		};
    
    		timer11: timer@48088000 {
    			compatible = "ti,omap5430-timer";
    			reg = <0x48088000 0x80>;
    			interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "timer11";
    			ti,timer-pwm;
    		};
    
    		wdt2: wdt@4ae14000 {
    			compatible = "ti,omap5-wdt", "ti,omap3-wdt";
    			reg = <0x4ae14000 0x80>;
    			interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "wd_timer2";
    		};
    
    		dmm@4e000000 {
    			compatible = "ti,omap5-dmm";
    			reg = <0x4e000000 0x800>;
    			interrupts = <0 113 0x4>;
    			ti,hwmods = "dmm";
    		};
    
    		emif1: emif@4c000000 {
    			compatible	= "ti,emif-4d5";
    			ti,hwmods	= "emif1";
    			ti,no-idle-on-init;
    			phy-type	= <2>; /* DDR PHY type: Intelli PHY */
    			reg = <0x4c000000 0x400>;
    			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
    			hw-caps-read-idle-ctrl;
    			hw-caps-ll-interface;
    			hw-caps-temp-alert;
    		};
    
    		emif2: emif@4d000000 {
    			compatible	= "ti,emif-4d5";
    			ti,hwmods	= "emif2";
    			ti,no-idle-on-init;
    			phy-type	= <2>; /* DDR PHY type: Intelli PHY */
    			reg = <0x4d000000 0x400>;
    			interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
    			hw-caps-read-idle-ctrl;
    			hw-caps-ll-interface;
    			hw-caps-temp-alert;
    		};
    
    		usb3: omap_dwc3@4a020000 {
    			compatible = "ti,dwc3";
    			ti,hwmods = "usb_otg_ss";
    			reg = <0x4a020000 0x10000>;
    			interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
    			#address-cells = <1>;
    			#size-cells = <1>;
    			utmi-mode = <2>;
    			ranges;
    			dwc3: dwc3@4a030000 {
    				compatible = "snps,dwc3";
    				reg = <0x4a030000 0x10000>;
    				interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
    					     <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
    					     <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
    				interrupt-names = "peripheral",
    						  "host",
    						  "otg";
    				phys = <&usb2_phy>, <&usb3_phy>;
    				phy-names = "usb2-phy", "usb3-phy";
    				dr_mode = "peripheral";
    			};
    		};
    
    		ocp2scp@4a080000 {
    			compatible = "ti,omap-ocp2scp";
    			#address-cells = <1>;
    			#size-cells = <1>;
    			reg = <0x4a080000 0x20>;
    			ranges;
    			ti,hwmods = "ocp2scp1";
    			usb2_phy: usb2phy@4a084000 {
    				compatible = "ti,omap-usb2";
    				reg = <0x4a084000 0x7c>;
    				syscon-phy-power = <&scm_conf 0x300>;
    				clocks = <&usb_phy_cm_clk32k>, <&usb_otg_ss_refclk960m>;
    				clock-names = "wkupclk", "refclk";
    				#phy-cells = <0>;
    			};
    
    			usb3_phy: usb3phy@4a084400 {
    				compatible = "ti,omap-usb3";
    				reg = <0x4a084400 0x80>,
    				      <0x4a084800 0x64>,
    				      <0x4a084c00 0x40>;
    				reg-names = "phy_rx", "phy_tx", "pll_ctrl";
    				syscon-phy-power = <&scm_conf 0x370>;
    				clocks = <&usb_phy_cm_clk32k>,
    					 <&sys_clkin>,
    					 <&usb_otg_ss_refclk960m>;
    				clock-names =	"wkupclk",
    						"sysclk",
    						"refclk";
    				#phy-cells = <0>;
    			};
    		};
    
    		usbhstll: usbhstll@4a062000 {
    			compatible = "ti,usbhs-tll";
    			reg = <0x4a062000 0x1000>;
    			interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
    			ti,hwmods = "usb_tll_hs";
    		};
    
    		usbhshost: usbhshost@4a064000 {
    			compatible = "ti,usbhs-host";
    			reg = <0x4a064000 0x800>;
    			ti,hwmods = "usb_host_hs";
    			#address-cells = <1>;
    			#size-cells = <1>;
    			ranges;
    			clocks = <&l3init_60m_fclk>,
    				 <&xclk60mhsp1_ck>,
    				 <&xclk60mhsp2_ck>;
    			clock-names = "refclk_60m_int",
    				      "refclk_60m_ext_p1",
    				      "refclk_60m_ext_p2";
    
    			usbhsohci: ohci@4a064800 {
    				compatible = "ti,ohci-omap3";
    				reg = <0x4a064800 0x400>;
    				interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
    			};
    
    			usbhsehci: ehci@4a064c00 {
    				compatible = "ti,ehci-omap";
    				reg = <0x4a064c00 0x400>;
    				interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
    			};
    		};
    
    		bandgap: bandgap@4a0021e0 {
    			reg = <0x4a0021e0 0xc
    			       0x4a00232c 0xc
    			       0x4a002380 0x2c
    			       0x4a0023C0 0x3c>;
    			interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
    			compatible = "ti,omap5430-bandgap";
    
    			#thermal-sensor-cells = <1>;
    		};
    
    		/* OCP2SCP3 */
    		ocp2scp@4a090000 {
    			compatible = "ti,omap-ocp2scp";
    			#address-cells = <1>;
    			#size-cells = <1>;
    			reg = <0x4a090000 0x20>;
    			ranges;
    			ti,hwmods = "ocp2scp3";
    			sata_phy: phy@4a096000 {
    				compatible = "ti,phy-pipe3-sata";
    				reg = <0x4A096000 0x80>, /* phy_rx */
    				      <0x4A096400 0x64>, /* phy_tx */
    				      <0x4A096800 0x40>; /* pll_ctrl */
    				reg-names = "phy_rx", "phy_tx", "pll_ctrl";
    				syscon-phy-power = <&scm_conf 0x374>;
    				clocks = <&sys_clkin>, <&sata_ref_clk>;
    				clock-names = "sysclk", "refclk";
    				#phy-cells = <0>;
    			};
    		};
    
    		sata: sata@4a141100 {
    			compatible = "snps,dwc-ahci";
    			reg = <0x4a140000 0x1100>, <0x4a141100 0x7>;
    			interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
    			phys = <&sata_phy>;
    			phy-names = "sata-phy";
    			clocks = <&sata_ref_clk>;
    			ti,hwmods = "sata";
    			ports-implemented = <0x1>;
    		};
    
    		dss: dss@58000000 {
    			compatible = "ti,omap5-dss";
    			reg = <0x58000000 0x80>;
    			status = "disabled";
    			ti,hwmods = "dss_core";
    			clocks = <&dss_dss_clk>;
    			clock-names = "fck";
    			#address-cells = <1>;
    			#size-cells = <1>;
    			ranges;
    
    			dispc@58001000 {
    				compatible = "ti,omap5-dispc";
    				reg = <0x58001000 0x1000>;
    				interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
    				ti,hwmods = "dss_dispc";
    				clocks = <&dss_dss_clk>;
    				clock-names = "fck";
    			};
    
    			rfbi: encoder@58002000  {
    				compatible = "ti,omap5-rfbi";
    				reg = <0x58002000 0x100>;
    				status = "disabled";
    				ti,hwmods = "dss_rfbi";
    				clocks = <&dss_dss_clk>, <&l3_iclk_div>;
    				clock-names = "fck", "ick";
    			};
    
    			dsi1: encoder@58004000 {
    				compatible = "ti,omap5-dsi";
    				reg = <0x58004000 0x200>,
    				      <0x58004200 0x40>,
    				      <0x58004300 0x40>;
    				reg-names = "proto", "phy", "pll";
    				interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
    				status = "disabled";
    				ti,hwmods = "dss_dsi1";
    				clocks = <&dss_dss_clk>, <&dss_sys_clk>;
    				clock-names = "fck", "sys_clk";
    			};
    
    			dsi2: encoder@58005000 {
    				compatible = "ti,omap5-dsi";
    				reg = <0x58009000 0x200>,
    				      <0x58009200 0x40>,
    				      <0x58009300 0x40>;
    				reg-names = "proto", "phy", "pll";
    				interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
    				status = "disabled";
    				ti,hwmods = "dss_dsi2";
    				clocks = <&dss_dss_clk>, <&dss_sys_clk>;
    				clock-names = "fck", "sys_clk";
    			};
    
    			hdmi: encoder@58060000 {
    				compatible = "ti,omap5-hdmi";
    				reg = <0x58040000 0x200>,
    				      <0x58040200 0x80>,
    				      <0x58040300 0x80>,
    				      <0x58060000 0x19000>;
    				reg-names = "wp", "pll", "phy", "core";
    				interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
    				status = "disabled";
    				ti,hwmods = "dss_hdmi";
    				clocks = <&dss_48mhz_clk>, <&dss_sys_clk>;
    				clock-names = "fck", "sys_clk";
    				dmas = <&sdma 76>;
    				dma-names = "audio_tx";
    			};
    		};
    
    		abb_mpu: regulator-abb-mpu {
    			compatible = "ti,abb-v2";
    			regulator-name = "abb_mpu";
    			#address-cells = <0>;
    			#size-cells = <0>;
    			clocks = <&sys_clkin>;
    			ti,settling-time = <50>;
    			ti,clock-cycles = <16>;
    
    			reg = <0x4ae07cdc 0x8>, <0x4ae06014 0x4>,
    			      <0x4a0021c4 0x8>, <0x4ae0c318 0x4>;
    			reg-names = "base-address", "int-address",
    				    "efuse-address", "ldo-address";
    			ti,tranxdone-status-mask = <0x80>;
    			/* LDOVBBMPU_MUX_CTRL */
    			ti,ldovbb-override-mask = <0x400>;
    			/* LDOVBBMPU_VSET_OUT */
    			ti,ldovbb-vset-mask = <0x1F>;
    
    			/*
    			 * NOTE: only FBB mode used but actual vset will
    			 * determine final biasing
    			 */
    			ti,abb_info = <
    			/*uV		ABB	efuse	rbb_m fbb_m	vset_m*/
    			1060000		0	0x0	0 0x02000000 0x01F00000
    			1250000		0	0x4	0 0x02000000 0x01F00000
    			>;
    		};
    
    		abb_mm: regulator-abb-mm {
    			compatible = "ti,abb-v2";
    			regulator-name = "abb_mm";
    			#address-cells = <0>;
    			#size-cells = <0>;
    			clocks = <&sys_clkin>;
    			ti,settling-time = <50>;
    			ti,clock-cycles = <16>;
    
    			reg = <0x4ae07ce4 0x8>, <0x4ae06010 0x4>,
    			      <0x4a0021a4 0x8>, <0x4ae0c314 0x4>;
    			reg-names = "base-address", "int-address",
    				    "efuse-address", "ldo-address";
    			ti,tranxdone-status-mask = <0x80000000>;
    			/* LDOVBBMM_MUX_CTRL */
    			ti,ldovbb-override-mask = <0x400>;
    			/* LDOVBBMM_VSET_OUT */
    			ti,ldovbb-vset-mask = <0x1F>;
    
    			/*
    			 * NOTE: only FBB mode used but actual vset will
    			 * determine final biasing
    			 */
    			ti,abb_info = <
    			/*uV		ABB	efuse	rbb_m fbb_m	vset_m*/
    			1025000		0	0x0	0 0x02000000 0x01F00000
    			1120000		0	0x4	0 0x02000000 0x01F00000
    			>;
    		};
    	};
    };
    
    &cpu_thermal {
    	polling-delay = <500>; /* milliseconds */
    };
    
    /include/ "omap54xx-clocks.dtsi"
    

  • The link to GLSDK 6.03.00.01 is below:

    downloads.ti.com/.../index_FDS.html

    Regards,
    Pavel
  • Dear Pavel thanks for your quick support.

    we have been check the "GLSDK 6.03.00.01" SDK but still we did not find any iss driver for csi-2[mipi camera].

    So please provide us the iss driver so we will test our sensor with the omap5432-uevm board.

    Thanks & Best Regards;

    Nikunj Patel

  • Hi Nikunj,

    I do not have ISS driver or any other driver that is not included by default in the OMAP5 SDK. If you nee someone to develop for you driver (or any other software) that is not included in OMAP5 SDK by default, you might contact a 3rd party from the TI network partners.

    Regards,
    Pavel
  • Hello everyone & Pavel;

    I had successfully port the csi-2 [iss driver][omap4-iss] on omap5432 board and it show the node "/dev/video0".


    but whenever we try to excess the /dev/video0 node the kernel will show the below Error.

    311.065122] ------------[ cut here ]------------
    [ 311.065148] WARNING: CPU: 0 PID: 0 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x274/0x38c()
    [ 311.065159] 44000000.ocp:L3 Standard Error: MASTER MPU TARGET ISS (Read): At Address: 0x00000074 : Data Access in Supervisor mode during Functional access
    [ 311.065167] Modules linked in: smsc95xx usbnet bnep bluetooth ehci_omap ehci_hcd snd_soc_omap_hdmi_audio snd_soc_omap_abe_twl6040 snd_soc_twl6040 omap4_keypad matrix_keymap dwc3_omap spi_omap2_mcspi gpio_pca953x snd_soc_omap_mo
    [ 311.065275] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G W 4.1.38-armv7-lpae-x4 #13
    [ 311.065283] Hardware name: Generic OMAP5 (Flattened Device Tree)
    [ 311.065305] [<c0031d58>] (unwind_backtrace) from [<c002c104>] (show_stack+0x20/0x24)
    [ 311.065320] [<c002c104>] (show_stack) from [<c09f3484>] (dump_stack+0x9c/0xb0)
    [ 311.065336] [<c09f3484>] (dump_stack) from [<c006065c>] (warn_slowpath_common+0x94/0xc4)
    [ 311.065349] [<c006065c>] (warn_slowpath_common) from [<c00606cc>] (warn_slowpath_fmt+0x40/0x48)
    [ 311.065364] [<c00606cc>] (warn_slowpath_fmt) from [<c0563300>] (l3_interrupt_handler+0x274/0x38c)
    [ 311.065381] [<c0563300>] (l3_interrupt_handler) from [<c00b85d4>] (handle_irq_event_percpu+0xbc/0x258)
    [ 311.065395] [<c00b85d4>] (handle_irq_event_percpu) from [<c00b87c4>] (handle_irq_event+0x54/0x74)
    [ 311.065408] [<c00b87c4>] (handle_irq_event) from [<c00bb7fc>] (handle_fasteoi_irq+0xbc/0x190)
    [ 311.065420] [<c00bb7fc>] (handle_fasteoi_irq) from [<c00b7b6c>] (generic_handle_irq+0x3c/0x4c)
    [ 311.065434] [<c00b7b6c>] (generic_handle_irq) from [<c00b7e78>] (__handle_domain_irq+0x6c/0xc4)
    [ 311.065447] [<c00b7e78>] (__handle_domain_irq) from [<c0009618>] (gic_handle_irq+0x34/0x70)
    [ 311.065458] [<c0009618>] (gic_handle_irq) from [<c09f9400>] (__irq_svc+0x40/0x54)
    [ 311.065465] Exception stack(0xc0f2ff00 to 0xc0f2ff48)
    [ 311.065474] ff00: 00000001 00000000 00000000 c004e228 c0f2e000 c0f31658 00000000 00000000
    [ 311.065484] ff20: c0a023c0 c0f315f4 c100e789 c0f2ff54 c0f2ff48 c0f2ff48 c004de50 c0028b38
    [ 311.065490] ff40: a00f0013 ffffffff
    [ 311.065504] [<c09f9400>] (__irq_svc) from [<c0028b38>] (arch_cpu_idle+0x30/0x4c)
    [ 311.065518] [<c0028b38>] (arch_cpu_idle) from [<c009ed48>] (cpu_startup_entry+0x388/0x404)
    [ 311.065531] [<c009ed48>] (cpu_startup_entry) from [<c09eed80>] (rest_init+0x88/0x8c)
    [ 311.065546] [<c09eed80>] (rest_init) from [<c0e69da4>] (start_kernel+0x444/0x450)
    [ 311.065553] ---[ end trace 48bf7e82ab86f27c ]---
    [ 311.070148] ------------[ cut here ]------------
    [ 311.070163] WARNING: CPU: 0 PID: 0 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x274/0x38c()
    [ 311.070173] 44000000.ocp:L3 Standard Error: MASTER MPU TARGET ISS (Read): At Address: 0x00010030 : Data Access in Supervisor mode during Functional access
    [ 311.070179] Modules linked in: smsc95xx usbnet bnep bluetooth ehci_omap ehci_hcd snd_soc_omap_hdmi_audio snd_soc_omap_abe_twl6040 snd_soc_twl6040 omap4_keypad matrix_keymap dwc3_omap spi_omap2_mcspi gpio_pca953x snd_soc_omap_mo
    [ 311.070270] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G W 4.1.38-armv7-lpae-x4 #13
    [ 311.070277] Hardware name: Generic OMAP5 (Flattened Device Tree)
    [ 311.070292] [<c0031d58>] (unwind_backtrace) from [<c002c104>] (show_stack+0x20/0x24)
    [ 311.070305] [<c002c104>] (show_stack) from [<c09f3484>] (dump_stack+0x9c/0xb0)
    [ 311.070318] [<c09f3484>] (dump_stack) from [<c006065c>] (warn_slowpath_common+0x94/0xc4)
    [ 311.070330] [<c006065c>] (warn_slowpath_common) from [<c00606cc>] (warn_slowpath_fmt+0x40/0x48)
    [ 311.070344] [<c00606cc>] (warn_slowpath_fmt) from [<c0563300>] (l3_interrupt_handler+0x274/0x38c)
    [ 311.070358] [<c0563300>] (l3_interrupt_handler) from [<c00b85d4>] (handle_irq_event_percpu+0xbc/0x258)
    [ 311.070371] [<c00b85d4>] (handle_irq_event_percpu) from [<c00b87c4>] (handle_irq_event+0x54/0x74)
    [ 311.070383] [<c00b87c4>] (handle_irq_event) from [<c00bb7fc>] (handle_fasteoi_irq+0xbc/0x190)
    [ 311.070394] [<c00bb7fc>] (handle_fasteoi_irq) from [<c00b7b6c>] (generic_handle_irq+0x3c/0x4c)
    [ 311.070406] [<c00b7b6c>] (generic_handle_irq) from [<c00b7e78>] (__handle_domain_irq+0x6c/0xc4)
    [ 311.070417] [<c00b7e78>] (__handle_domain_irq) from [<c0009618>] (gic_handle_irq+0x34/0x70)
    [ 311.070428] [<c0009618>] (gic_handle_irq) from [<c09f9400>] (__irq_svc+0x40/0x54)
    [ 311.070434] Exception stack(0xc0f2ff00 to 0xc0f2ff48)
    [ 311.070444] ff00: 00000001 00000000 00000000 c004e228 c0f2e000 c0f31658 00000000 00000000
    [ 311.070452] ff20: c0a023c0 c0f315f4 c100e789 c0f2ff54 c0f2ff48 c0f2ff48 c004de50 c0028b38
    [ 311.070459] ff40: a00f0013 ffffffff
    [ 311.070472] [<c09f9400>] (__irq_svc) from [<c0028b38>] (arch_cpu_idle+0x30/0x4c)
    [ 311.070485] [<c0028b38>] (arch_cpu_idle) from [<c009ed48>] (cpu_startup_entry+0x388/0x404)
    [ 311.070496] [<c009ed48>] (cpu_startup_entry) from [<c09eed80>] (rest_init+0x88/0x8c)
    [ 311.070508] [<c09eed80>] (rest_init) from [<c0e69da4>] (start_kernel+0x444/0x450)
    [ 311.070515] ---[ end trace 48bf7e82ab86f27d ]---




    our dtb configuration as below:

    iss: iss@52000000 {
    compatible = "ti,omap4-iss";
    reg = <0x52000000 0x100>, /* top */
    <0x52001000 0x170>, /* csi2_a_regs1 */
    <0x52001170 0x020>, /* camerarx_core1 */
    <0x52001400 0x170>, /* csi2_b_regs1 */
    <0x52001570 0x020>, /* camerarx_core2 */
    <0x52002000 0x200>, /* bte */
    <0x52010000 0x0a0>, /* isp_sys1 */
    <0x52010400 0x400>, /* isp_resizer */
    <0x52010800 0x800>, /* isp_ipipe */
    <0x52011000 0x200>, /* isp_isif */
    <0x52011200 0x080>; /* isp_ipipeif */
    reg-names = "top",
    "csi2_a_regs1",
    "camerarx_core1",
    "csi2_b_regs1",
    "camerarx_core2",
    "bte",
    "isp_sys1",
    "isp_resizer",
    "isp_ipipe",
    "isp_isif",
    "isp_ipipeif";
    status = "ok";
    ti,hwmods = "iss";
    interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
    clocks = <&ducati_clk_mux_ck>, <&iss_ctrlclk>;
    clock-names = "iss_fck", "iss_ctrlclk";
    dmas = <&sdma 9>, <&sdma 10>, <&sdma 12>, <&sdma 13>;
    dma-names = "1", "2", "3", "4";
    };

    &i2c3 {
    pinctrl-names = "default";
    pinctrl-0 = <&i2c3_pins>;
    status = "ok";

    clock-frequency = <100000>;

    ov5640_1_camera: camera@3c {
    compatible = "omnivision,ov5640";
    status = "ok";
    reg = <0x3c>;

    pwdn-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>; // gpio1_13 - power down
    reset-gpios = <&gpio8 2 GPIO_ACTIVE_LOW>; // gpio8_226 - reset

    clocks = <&auxclk1_ck>;

    port {
    ov5640_1_cam_ep: endpoint {
    clock-lanes = <4>;
    data-lanes = <0 1>;
    remote-endpoint = <&csi2a_ep>;
    };
    };
    };
    };


    &iss {
    status = "ok";

    pinctrl-names = "default";
    pinctrl-0 = <&iss_csi21_pins>;

    ports {
    port@0 {
    csi2a_ep: endpoint {
    remote-endpoint = <&ov5640_1_cam_ep>;
    clock-lanes = <4>;
    data-lanes = <0 1>;
    crc = <0>;
    lane-polarities = <0 0 0>;
    };
    };
    };
    };

    Please provide us the further support to solve the issue.
    Thanks & Best Regards;

    Nikunj Patel 

  • Hello everyone;

    We have been use the omapconf tool to check the register details. please find the more details as below.

    1) omapconf show prcm cam

    OMAPCONF (rev 1.73-nogit built Mon Jun 12 15:26:28 UTC 2017)

    HW Platform:
    Generic OMAP5 (Flattened Device Tree)
    OMAP5432 ES2.0 GP Device (STANDARD performance (1.5GHz))
    TWL6035 ES1.0 (EPROM rev0.0)
    TWL6040 ES1.2

    SW Build Details:
    Build:
    Version: Ubuntu 16.04.3 LTS
    Kernel:
    Version: 4.1.38-armv7-lpae-x4
    Author: nikunj.patel.369@ci5lub061309
    Toolchain: gcc version 4.9.4 20151028 (prerelease) (Linaro GCC 4.9-2016.02)
    Type: #31 SMP
    Date: Tue Dec 5 15:16:06 IST 2017

    |----------------------------------------------------------------|
    | CAM Power Domain Configuration |
    |----------------------------------------------------------------|
    | Power State | Current | Target | Last |
    |----------------------------------|---------|---------|---------|
    | Domain                           | ON     | OFF  | OFF   |
    | Logic                               | ON     |          |           |
    | Memory                           |           |          |           |
    | MEM                                | ON    |          |           |
    |----------------------------------------------------------------|
    | Ongoing Power Transition? | NO |
    |----------------------------------------------------------------|

    |----------------------------------------------------------------|
    | CAM Clock Domain Configuration |
    |--------------------------------------|-------------------------|
    | Clock State Transition control | HW-Auto |
    | CAM_L3_GIFCLK                   | Gated |
    | CAM_BOOST_GCLK              | Running |
    | FDIF_GCLK                             | Gated |
    | CSI_PHY_GFCLK                   | Gated |
    | CAM_GCLK                            | Gated |
    |----------------------------------------------------------------|

    |------------------------------------------------------------------------|
    | FDIF Module Configuration |
    |----------------------------------|-------------------------------------|
    | Source Clock                                | FDIF_GFCLK |
    | Source Clock Rate                       | 128.000MHz |
    | Mode                                            | Disabled (NO ACCESS) |
    | Idle Status                                    | Disabled (NO ACCESS) |
    | Standby Status                            | In Standby |
    | FDIF_CLK Ratio                          | FDIF_CLK = FUNC_128M_CLK / 1 |
    | Context                                        | Lost |
    |------------------------------------------------------------------------|

    |------------------------------------------------------------------------|
    | ISS Module Configuration |
    |----------------------------------|-------------------------------------|
    | Source Clock                  | CORE_ISS_MAIN_CLK |
    | Source Clock Rate          | 303.908MHz |
    | Mode                               | Enabled (EXPLICITLY) |
    | Idle Status                       | OCP-ONLY Idle |
    | Standby Status                | In Standby |
    | Optional functional clock | Disabled |
    | Context                            | Retained |
    |------------------------------------------------------------------------|

    |------------------------------------------------------------------------|
    | CAL Module Configuration |
    |----------------------------------|-------------------------------------|
    | Source Clock                     | CAM_L3_GICLK |
    | Source Clock Rate            | 265.919MHz |
    | Mode                                 | Disabled (NO ACCESS) |
    | Idle Status                         | Disabled (NO ACCESS) |
    | Standby Status                 | Not Available (does not exist) |
    | Context                             | Lost |
    |------------------------------------------------------------------------|



    2) omapconf dump prcm cam

    OMAPCONF (rev 1.73-nogit built Mon Jun 12 15:26:28 UTC 2017)

    HW Platform:
    Generic OMAP5 (Flattened Device Tree)
    OMAP5432 ES2.0 GP Device (STANDARD performance (1.5GHz))
    TWL6035 ES1.0 (EPROM rev0.0)
    TWL6040 ES1.2

    SW Build Details:
    Build:
    Version: Ubuntu 16.04.3 LTS
    Kernel:
    Version: 4.1.38-armv7-lpae-x4
    Author: nikunj.patel.369@ci5lub061309
    Toolchain: gcc version 4.9.4 20151028 (prerelease) (Linaro GCC 4.9-2016.02)
    Type: #31 SMP
    Date: Tue Dec 5 15:16:06 IST 2017

    |-------------------------------------------------|
    | PRM CAM Reg. Name | Reg. Address | Reg. Value |
    |-------------------------------------------------|
    | PM_CAM_PWRSTCTRL       | 0x4AE07300 | 0x00030000 |
    | PM_CAM_PWRSTST            | 0x4AE07304 | 0x00000037 |
    | RM_CAM_ISS_CONTEXT    | 0x4AE07324 | 0x00000000 |
    | RM_CAM_FDIF_CONTEXT | 0x4AE0732C | 0x00000101 |
    | RM_CAM_CAL_CONTEXT  | 0x4AE07334 | 0x00000101 |
    |-------------------------------------------------|

    |---------------------------------------------------|
    | CM CORE CAM Reg. Name | Reg. Address | Reg. Value |
    |---------------------------------------------------|
    | CM_CAM_CLKSTCTRL | 0x4A009300 | 0x00000803 |
    | CM_CAM_STATICDEP | 0x4A009304 | 0x00000040 |
    | CM_CAM_DYNAMICDEP | 0x4A009308 | 0x00000000 |
    | CM_CAM_ISS_CLKCTRL | 0x4A009320 | 0x00060002 |
    | CM_CAM_FDIF_CLKCTRL | 0x4A009328 | 0x00070000 |
    | CM_CAM_CAL_CLKCTRL | 0x4A009330 | 0x00030000 |
    |---------------------------------------------------|




    3) read all the camera address:

    CONTROL_CAMERA_RX
    root@arm:~# omapconf read 0x4A002E08
    00C01806

    CONTROL_CORE_PAD0_CSIPORTA_LANE0X_PAD1_CSIPORTA_LANE0Y
    root@arm:~# omapconf read 0x4A002958
    01000100

    CONTROL_CORE_PAD0_CSIPORTA_LANE0X_PAD1_CSIPORTA_LANE1Y
    root@arm:~# omapconf read 0x4A00295C
    01000100

    CONTROL_CORE_PAD0_CSIPORTA_LANE0X_PAD1_CSIPORTA_LANE2Y
    root@arm:~# omapconf read 0x4A002960
    010F010F

    CONTROL_CORE_PAD0_CSIPORTA_LANE0X_PAD1_CSIPORTA_LANE3Y
    root@arm:~# omapconf read 0x4A002964
    010F010F

    CONTROL_CORE_PAD0_CSIPORTA_LANE0X_PAD1_CSIPORTA_LANE4Y
    root@arm:~# omapconf read 0x4A002968
    01000100

    CSI2_SYSCONFIG
    root@arm:~# omapconf read 0x52001010
    [ 701.984338] Unhandled fault: asynchronous external abort (0x1211) at 0x00000000
    [ 701.991679] pgd = eba39080
    [ 701.994396] [00000000] *pgd=aa498003, *pmd=fd876003

    CSI2_SYSSTATUS:
    root@arm:~# omapconf read 0x52001014
    [ 758.164385] Unhandled fault: asynchronous external abort (0x1211) at 0x00000000
    [ 758.171724] pgd = ebb23400
    [ 758.174440] [00000000] *pgd=aa61f003, *pmd=fd8e8003

    CSI2_IRQSTATUS:
    root@arm:~# omapconf read 0x52001018
    [ 1015.164323] Unhandled fault: asynchronous external abort (0x1211) at 0x00000000
    [ 1015.171664] pgd = ed733e40
    [ 1015.174380] [00000000] *pgd=aa605003, *pmd=fd876003

    CSI2_IRQENABLE:
    root@arm:~# omapconf read 0x5200101c
    [ 1043.294261] Unhandled fault: asynchronous external abort (0x1211) at 0x00000000
    [ 1043.301602] pgd = ebbfb240
    [ 1043.304317] [00000000] *pgd=ad69f003, *pmd=fd833003

    CSI2_CTRL:
    root@arm:~# omapconf read 0x52001040
    [ 1097.784331] Unhandled fault: asynchronous external abort (0x1211) at 0x00000000
    [ 1097.791671] pgd = eba39e00
    [ 1097.794387] [00000000] *pgd=aa466003, *pmd=fd8e8003

    CSI2_DBG_H:
    root@arm:~# omapconf read 0x52001044
    [ 1129.944272] Unhandled fault: asynchronous external abort (0x1211) at 0x00000000
    [ 1129.951613] pgd = ebb232c0
    [ 1129.954330] [00000000] *pgd=aba1d003, *pmd=fd964003

    CSI2_COMPLEXIO_CFG:
    root@arm:~# omapconf read 0x52001050
    [ 1163.674228] Unhandled fault: asynchronous external abort (0x1211) at 0x00000000
    [ 1163.681568] pgd = ed733780
    [ 1163.684283] [00000000] *pgd=ad644003, *pmd=fd856003

    CSI2_COMPLEXIO_IRQSTATUS:
    root@arm:~# omapconf read 0x52001054
    [ 1196.354264] Unhandled fault: asynchronous external abort (0x1211) at 0x00000000
    [ 1196.361605] pgd = ea5e5680
    [ 1196.364320] [00000000] *pgd=aa44c003, *pmd=fd8a6003

    CSI2_SHORT_PACKET:
    root@arm:~# omapconf read 0x5200105c
    [ 1232.894285] Unhandled fault: asynchronous external abort (0x1211) at 0x00000000
    [ 1232.901625] pgd = ea4b2280
    [ 1232.904341] [00000000] *pgd=ab98b003, *pmd=fd8a1003

    CSI2_COMPLEXIO_IRQENABLE:
    root@arm:~# omapconf read 0x52001060
    [ 1274.474353] Unhandled fault: asynchronous external abort (0x1211) at 0x00000000
    [ 1274.481694] pgd = ed733c40
    [ 1274.484410] [00000000] *pgd=aa4e0003, *pmd=ab831003, *pte=00000000

    CSI2_DBG_P:
    root@arm:~# omapconf read 0x52001068
    [ 1304.714342] Unhandled fault: asynchronous external abort (0x1211) at 0x00000000
    [ 1304.721683] pgd = ea4b2900
    [ 1304.724398] [00000000] *pgd=aa5e4003, *pmd=ab97c003, *pte=00000000

    CSI2_TIMING:
    root@arm:~# omapconf read 0x5200106c
    [ 1349.124260] Unhandled fault: asynchronous external abort (0x1211) at 0x00000000
    [ 1349.131600] pgd = ed487940
    [ 1349.134316] [00000000] *pgd=aa5e8003, *pmd=aba78003, *pte=00000000

    CSI2_CTX_CTRL1(0):
    root@arm:~# omapconf read 0x52001070
    [ 1387.874334] Unhandled fault: asynchronous external abort (0x1211) at 0x00000000
    [ 1387.881674] pgd = ed7331c0
    [ 1387.884390] [00000000] *pgd=aa528003, *pmd=fd966003

    CSI2_CTX_CTRL2(0):
    root@arm:~# omapconf read 0x52001074
    [ 1419.294319] Unhandled fault: asynchronous external abort (0x1211) at 0x00000000
    [ 1419.301660] pgd = eba1cc40
    [ 1419.304375] [00000000] *pgd=abb28003, *pmd=fd8d3003

    CSI2_CTX_DAT_OFST(0):
    root@arm:~# omapconf read 0x52001078
    [ 1447.404312] Unhandled fault: asynchronous external abort (0x1211) at 0x00000000
    [ 1447.411653] pgd = ed686980
    [ 1447.414370] [00000000] *pgd=aa48d003, *pmd=fd924003

    CSI2_CTX_PING_ADDR(0):
    root@arm:~# omapconf read 0x5200107c
    [ 1483.634280] Unhandled fault: asynchronous external abort (0x1211) at 0x00000000
    [ 1483.641620] pgd = eb841440
    [ 1483.644337] [00000000] *pgd=aa504003, *pmd=fd921003

    CSI2_CTX_PONG_ADDR(0):
    root@arm:~# omapconf read 0x52001080
    [ 1508.834269] Unhandled fault: asynchronous external abort (0x1211) at 0x00000000
    [ 1508.841610] pgd = eba397c0
    [ 1508.844327] [00000000] *pgd=abb5a003, *pmd=fd857003

    CSI2_CTX_IRQENABLE(0):
    root@arm:~# omapconf read 0x52001084
    [ 1540.003942] Unhandled fault: asynchronous external abort (0x1211) at 0x00000000
    [ 1540.011339] pgd = eba1c2c0
    [ 1540.014057] [00000000] *pgd=ad73f003, *pmd=fd8a1003

    CSI2_CTX_IRQSTATUS(0):
    root@arm:~# omapconf read 0x52001088
    [ 1558.994299] Unhandled fault: asynchronous external abort (0x1211) at 0x00000000
    [ 1559.001639] pgd = ea5e9f80
    [ 1559.004355] [00000000] *pgd=aa5dc003, *pmd=fd966003

    as per above we are able to read the 0x4xxxxxxx address but not able to read the 0x52xxxxxx.

    Please help us to solve this issue.


    Thanks & Best Regards;
    Nikunj Patel

  • Gentle reminder;

    thanks & Best Regards;
    Nikunj Patel
  • This has been double posted and answered in the below e2e thread:

    e2e.ti.com/.../647460

    I am closing this thread.

    Regards,
    Pavel
  • Also for premium OMAP5 support (as the one you need here) you can check the below e2e post:

    e2e.ti.com/.../264215

    Regards,
    Pavel