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Max202 Application Question

Other Parts Discussed in Thread: MAX202

Currently I am using a Max202 chip in a design, and we have had occasional failures of the chip. We are currently working with the concept that they may be ESD failures, but I also was reviewing the design and noted that the unused TTL side TX and RX are tied together - would this be best practice or possibly cause any issues? Also, what do you think the likelihood of ESD causing this chip to fail is, specifically we are worried since the TX and RX go to PIC processor, but also are routed to a header for direct TTL level COM.

  • Matt,

    I have never seen the loop back on logic side, nevertheless, there is no harm in that.
    If there is an internal short any of pins 7, 8, 6 or 5 to ground then the cause was very likely ESD.
    Pins 5 or 6 may be damaged indirectly if pin 15 ground isn't connected to ground plane with very low inductance and resistance.