Dear Team
My customer use GD75232 of their RS232 port ,they feedback an issue that system can't detect their interface board with GD75232 and find the waveform of DY3(pin8 DTR) as attached , please help to check does it normal.
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Dear Team
My customer use GD75232 of their RS232 port ,they feedback an issue that system can't detect their interface board with GD75232 and find the waveform of DY3(pin8 DTR) as attached , please help to check does it normal.
Alex,
When did the issue happen, during power up or normal operation? The same question applies to the waveform. Under what condition was it capture? DY3 eventually goes to -12V when DA3 settles at 5V. I don't see any problem there. Do you mean there is an issue during the transition?
BTW, are you aware that GD75232 has a recommended power sequence? Please share more information. I will follow up.
Regards,
Alex,
Can you give some information about power supply, DA3 and DY3? What're the status of Vcc Vdd Vss during DA3 power up? What's the configuration of DA3 and DY3? Do they have pull up / pull down resistors? Was any external device driving DA3? Thanks,
Hao
Hi Hao
Please refer below for feedback.
Can you give some information about power supply, DA3 and DY3?
=>Please refer schematic as below.
What're the status of Vcc Vdd Vss during DA3 power up?
=>Please refer below waveform
What's the configuration of DA3 and DY3?
=>Please explain what of configuration you mean ? for example..?
Do they have pull up / pull down resistors?
=>there is no pull up / pull down resistors, please refer schematic.
Was any external device driving DA3?
=>no device connect on COM port when we measurement .
Alex,
Thanks for the screen captures. I just have one more question. What's the voltage level when DA3 is settled? If the pin was left floating, it would stay around 1.4V and DY3 would go high. I would like to understand what pulled up DA3 pin. Thanks,
Hao
Alex,
Considering the setup, the DA3 and DY3 responses make sense to me. When Vdd begins to ramp up, the state of internal circuitry is undetermined. As Vdd reaches a certain voltage level, all signals should behave like normal function. Therefore you see DY3 follows Vdd before responses to DA3 input. In lab test, I got similar results.
BTW, a specific power sequence is required in the datasheet (Note 4 on page 4). Ideally we want a power supply settles before another one starts ramping. When all power supplies ramp up/down at same time, even with some small delay among the timing, the device's behavior is hard to predict, which would depend on the relative potential and timing among the supplies. Please let me know if you have any questions.
Regards,