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TPS65983: masetr chip I2C port 2 not working

Part Number: TPS65983

Hi

We use TPS65983 in Thunderbolt 3 device design( Intel Apex Creek reference deign ). Software tools is TPS6598x Application Customization Tool. Our design we will use TPS65983 I2C port 2 to check status of USB-C .At tool version 2.12 generate firmware for TPS65983 it work fine. But all the later version up to 3.03 the master TPS65983 I2C port 2 will not work , all the I2C cycle is NACK. But slave TPS65983 can work fine.

Thanks in advance   

Steven Hone

  • Hi Steven,

    Sometimes the compatibility between versions is not consistent. Are you generating the failing FW of the 3.03 tool from a 3.03 template?

    I will see if I can recreate this, can I have your pjt file?

    Thanks

  • Hi Jeffrey

    Yes, We use 3.03 template. Also attach 3.03 and 2.12 pjt file.

    thank you

    Steven Hone 

    ARC8050T3-8_170208_2_12_final.pjt

  • Hi Steven,

    I2C1 and I2C2 have the same address, How are you able to select I2C2 master instead of I2C1 in version 2.12?

    Thanks

  • I just tested the two versions you mentioned. I was able to read fron both I2C interfaces with both versions. What hardware is your TPS65983 device mounted on? What tool are you using to access the two I2C ports?
  • We follow Intel Apex Creek design. There are 2 TPS65983. Both master and salve I2C1 is bus together with Intel Alpine Ridge DP chip . Both master and slave I2C2 is bus togther with our micro controller( Atmel mega ) . I2C1 and I2C2 is separate bus. We use Total Phase Aardvark i2c emulator to generate I2C cycle to test in separate I2C bus . We use 7'h38  address to master I2C2 and 7'h3f to slave I2C2. Is there anything wrong?  

  • We follow Intel Apex Creek design. There are 2 TPS65983. Both master and salve I2C1 is bus together with Intel Alpine Ridge DP chip . Both master and slave I2C2 is bus togther with our micro controller( Atmel mega ) . I2C1 and I2C2 is separate bus. We use Total Phase Aardvark i2c emulator to generate I2C cycle to test in separate I2C bus . We use 7'h38  address to master I2C2 and 7'h3f to slave I2C2. Is there anything wrong?

  • I just used you your project file from config tool 3.03 to generate an image. I put that image on my EVM and was able to access both I2C 1 and I2C of the TPS65983. On my EVM I2C_ADDR, DEBUG_CTL1, and DEBUG_CTL2 are all tied to ground. Since I2C_ADDR is ground, this is a master device. And, both I2C1 and I2C2 use the same 0x38 address.
    The Intell reference design shows PD port A using this same configuration. For PD port B, I2C_ADDR is floating. This means both I2C1 and I2C2 of PD port B will use address 0x3F. This means the address you mention are correct.
    We have other customers using version 3.03 of the config tool and none of them report any problems. Are you absolutely sure you are using the right address? Are you sure you you Aardvark connection is correct? Are you sure you the I2C pull-up on I2C 2 are in place?
  • HI Brad

    Sorry about delay response because my vacation. We also use version 3.03 for other Thunderbolt product that do not use I2C2 to check TBT port status and work fine . We do a test just remove the slave TPS65983 chip and short the UART_TX and UART_RX pin of master TPS65983. Then the master I2C2 is working. Maybe this is why your EVM can wok fine on version 3.03.  

  • Hi Brad

    I just download the new release configuration tool 3.7_1/firmware 4.39, It still can not working in master I2C2 port. And  working fine when we remove slave TPS65983 as I describe in previous mail. Have you try test the firmware 4.39 in two TPS65983 and matser/slave I2C2 is working fine.

    Thank You

    Steven Hone 

  • Steven:

    Yes, we have tested the firmare on a two chip board. And, so have many customers. So far, you have the only complaint about I2C communications.

    When you use the new firmware, are you able to get PD contracts on both the primary and secondary ports? (not a 5V USB connection, but a true PD negotiated power contract)

    What software are you using to control the Aardvark?

    Please send us a copy of your schematci so that we can take a look at it.
  • Hi Brad

    The new firmware work fine everything except master I2C2 communication. We also use the Total Phase PD analyzer to check PD negotiated power contract on both port and all working correctly.

    In main board we use a microprocessor i2c to check TBT3 daughter board status. I attach schematic of TBT3 daughter board and i2c analyzer capture result of 2 different firmware( 3.61 can access mater I2C2 , 4.39 can't access mater I2C2 but slave I2C2 ok )  and PD negotiated capture result of master port use fw4.39TPS65983.rar.

    i2c analyzer and PD analyzer all use Total Phase Data Center software. Hope it can figure out what's wrong in our design. 

    Thank you

    Steven

     

  • Please check the signal DG_ACE_A_I2C_ADDR in your design. When we look at your schematic we see that DG_ACE_A_I2C_ADDR is connected to pin F1 on the primary device. If we go to the next occurance of the string, it finds the text description in the "HW Pull-Up/Pull-Down" box that shows the signal should be grounded. If we try to go to the next occurance, it does not find anything even though we see it tied to ground in the same pull up/down box. We are wondering if there is a hidden or unprintable charcter that is cause the F1 pin to not be connected. If the pin is not ground, the I2C addresses of both TPS65983 devices will conflict. Removing the secondary device would remove the conflict.

    We don't know if this is the problem. But, the strange behavior of the schematic matches your description of the problem.
  • Hi Brad

    Thanks for your patient. I don't know what happen in your pdf search. But we really connect DG_ACE_A_I2C_ADDR to GND through a 10K resistor. Actually we took our Intel Apex Creek demo board replace TPS65982 to TPS65983 and same fail result. So any suggestion we can do next ?

    Steven Hone

  • Steven:

    We were finally able to duplicate the problem you described. Our firmware team is now debugging it. Once they know the cause and have a fix, a new firmware version will be released. They are debugging now, so I do not have an estimate for a release date. Once they tell me the date, I will send you and update.

    Thanks for your patience with this problem.

    Regards,

    Brad.

  • The cause of the problem was found and is being fixed. A new firmware release should be out at the end of the week that solves the problem.
  • Thank for you support.

    Steven Hone
  • A new version of the configuration tool with version tps65983 4.43 of the firmware was just posted to the TI seure web site. Please use your secure log in to access the new version. We tested it to verify that is fixes the problem you reported.

    Regards,

    Brad.

  • Hi Brad

    This new config tool 3.9 + fw 4.43 can not save project and binary( show error message " "projectsavewindow" object has no attribute"  ). But old config tool 3.71 + fw 4.43 is ok.  Can we use config tool 3.71 + fw 4.43?

  • I just talked to the person that builds the tool. He says that you can use the new firmware image with the old tool. Do you have a newer version of the tool than 3.71?

    A new tool installer will be available later today. If you send me your email address, we will send a link directly to you when it is available. My email address is bhale@ti.com.
  • The corrected configuration tool has been uploaded to the secure software site. Please pull the new tool from there.
  • Thank you. The corrected version is work fine.