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TPS65982: Events for controlling TUSB564

Takashi Onawa
Genius 13200 points
Part Number: TPS65982
Other Parts Discussed in Thread: TUSB564

Hi Team,

My customer would like to control TUSB564 by TPS65982 GPIO. Which events should be assigned to GPIOs of TPS65982 to control TUSB564 properly?

Regards,

Takashi Onawa

  • 0
    TI__Mastermind 36751 points
    Hi Onawa-san,

    For the TUSB546, pin 21 which is FLIP should be connected to a GPIO with event: "Port Connected CC2 (Cable Orientation Event)"
    Pin 22 of the TUSB546 which is CTL0 should be connected to a GPIO with event: "USB3 Event"
    Pin 23 of the TUSB546 which is CTL1 should be connected to a GPIO with event: "DP Mode Selection Event"

    Thank you,
    Eric
  • 0 in reply to Eric Beljaars
    TI__Genius 13200 points

    Hi Eric-san,

    Thanks for your quick reply.

    Can you make a function table to understand how the event behaves correctly?

    　 　 USB3 Event DP Mode
    Selection Event
    DFP Assignment A 　 　
    Assignment B 　 　
    Assignment C 　 　
    Assignment D 　 　
    Assignment E 　 　
    Assignment F 　 　
    UFP Assignment A 　 　
    Assignment B 　 　
    Assignment C 　 　
    Assignment D 　 　
    Assignment E 　 　
    H or L H or L

    Regards,

    Takashi Onawa

  • 0 in reply to Takashi Onawa
    TI__Mastermind 36751 points

    Hi Onawa-san,

    The GPIO control table can be found in the TUSB546 datasheet. I have included it below:

    Thank you,

    Eric

  • 0 in reply to Eric Beljaars
    TI__Genius 13200 points

    Hi Eric-san,

    And My customer would like to know GPIO output logic in the case of UFP_D Assignment E.

    But that information doesn't indicated in TPS65982 and TUSB564 datasheet and App note. So please fill the table below.

    USB3 Event DP Mode 
    Selection Event
    UFP Assignment A 　 　
    Assignment B 　 　
    Assignment C 　 　
    Assignment D 　 　
    Assignment E 　 　

    Regards,

    Takashi Onawa

  • 0 in reply to Takashi Onawa
    TI__Mastermind 36751 points

    Hi Onawa-san,

    Please refer to the table below:

    USB3 Event DP Mode 
    Selection Event
    Assignment A L H
    Assignment B H H
    UFP Assignment C L H
    Assignment D H H
    Assignment E L H

    Some of the pin assignments will have the same GPIO events triggered. The mux will handle these pin assignments in the same manner since either USB3 data or additional DP lanes will be muxed over those channels. 

    Here is the UFP pin assignment summary from the DP spec:

    Thank you,

    Eric

  • 0 in reply to Eric Beljaars
    TI__Genius 13200 points
    Hi Eric-san,

    One quick confirmation.
    Is there an event whose logic changes only in case of UFP_D Pin Assignment E in the latest FW?

    Regards,
    Takashi Onawa
  • 0 in reply to Takashi Onawa
    TI__Mastermind 36751 points
    Hi Onawa-san,

    The UFP_D Pin Assignment E will have the same GPIOs triggered as UFP_D Pin Assignment C and A. However, you could look at the DP SID Status Register (0x58) to see which Pin Assignment is currently being used after DP mode has been entered.

    Thank you,
    Eric
  • 0 in reply to Eric Beljaars
    TI__Genius 13200 points
    Hi Eric-san,

    OK, I understood that TPS6598X doesn't support lane and polarity swapping so far.
    I will recommend the solution which we discussed before in the following thread.
    e2e.ti.com/.../639715

    Regards,
    Takashi Onawa