• Resolved

Linux/TUSB7340: USB2.0 and lower failure / Xilinx ZynqMP / PCIe root / xhci-hcd Linux driver

Part Number: TUSB7340

Tool/software: Linux

Support Path: /Product/Development and troubleshooting/

Hello everyone,


I'm experiencing some problems with USB2.0 (and lower) peripherals attached to the TUSB7340 USB3.0 xHCI host controller ports. The hardware platform is a custom board based on Xilinx Zynq UltraScale+ MPSoC (7EV family) with PCIe root complex enabled within the Processing System (x1 link at 5 Gb/s). The USB3.0 devices (hub/storage) work just fine, but the slower ones are not enabled/present in the system. Linux kernel version is v4.9 (xilinx rel-2017.3) with xhci-hcd driver used for USB3.0 host (arm64/xilinx_zynqmp_defconfig). Output from lspci and lsusb tools is provided below:

00:00.0 PCI bridge: Xilinx Corporation Device 7012 (prog-if 00 [Normal decode])
    Flags: bus master, fast devsel, latency 0, IRQ 255
    Memory at e0100000 (32-bit, prefetchable) [size=8K]
    Bus: primary=00, secondary=01, subordinate=0c, sec-latency=0
    I/O behind bridge: 00000000-00000fff
    Memory behind bridge: e0000000-e00fffff
    Capabilities: [40] Power Management version 3
    Capabilities: [60] Express Root Port (Slot-), MSI 00
    Capabilities: [100] Device Serial Number 00-00-00-00-00-00-00-00
    Capabilities: [10c] Virtual Channel
    Capabilities: [128] Vendor Specific Information: ID=1234 Rev=1 Len=018 <?>

01:00.0 USB controller: Texas Instruments TUSB73x0 SuperSpeed USB 3.0 xHCI Host Controller (rev 02) (prog-if 30 [XHCI])
    Flags: bus master, fast devsel, latency 0, IRQ 54
    Memory at e0000000 (64-bit, non-prefetchable) [size=64K]
    Memory at e0010000 (64-bit, non-prefetchable) [size=8K]
    Capabilities: [40] Power Management version 3
    Capabilities: [48] MSI: Enable+ Count=1/8 Maskable- 64bit+
    Capabilities: [70] Express Endpoint, MSI 00
    Capabilities: [c0] MSI-X: Enable- Count=8 Masked-
    Capabilities: [100] Advanced Error Reporting
    Capabilities: [150] Device Serial Number 08-00-28-00-00-20-00-00
    Kernel driver in use: xhci_hcd

 

:~# lsusb -t
/:  Bus 02.Port 1: Dev 1, class="root_hub", Driver=xhci_hcd/4p, 5000M
/:  Bus 01.Port 1: Dev 1, class="root_hub", Driver=xhci_hcd/4p, 480M

There is completely no kernel messages produced when keyboard or mouse are attached, but in case of usb storage/hub I can see some kernel output attaching to 2 of 4 available ports like that:

[    3.440737] usb 1-2: new high-speed USB device number 2 using xhci_hcd
[    3.680735] usb 1-2: new high-speed USB device number 3 using xhci_hcd
[    4.115517] usb 1-2: new high-speed USB device number 4 using xhci_hcd
[    4.122036] usb 1-2: Device not responding to setup address.
[    4.332804] usb 1-2: Device not responding to setup address.
[    4.544763] usb 1-2: device not accepting address 4, error -71
[    4.668759] usb 1-2: new high-speed USB device number 5 using xhci_hcd
[    4.676095] usb 1-2: Device not responding to setup address.
[    4.888798] usb 1-2: Device not responding to setup address.
[    5.100758] usb 1-2: device not accepting address 5, error -71
[    5.111658] usb usb1-port2: unable to enumerate USB device

As reference, we have another one board with TUSB7320 host (yes, slightly different part with 2 ports only) based on Xilinx Zynq-7000 chip with PCIe root subsystem enabled in the FPGA fabric running on the same Linux kernel (built for armv7/xilinx_zynq_defconfig) with the same xhci-hcd driver used. And in this case no issues are reported: all kinds of USB peripherals work well. From system point of view, the only difference in USB3.0 design between these 2 boards lies in PCIe root complex implementation: "soft" IP for Zynq-7000 vs. "hardened" block for Zynq US+ MPSoC. The Linux drivers for these 2 PCIe hosts are also different: pcie-xilinx.c for soft PCIe host vs. pcie-xilinx-nwl.c for the integrated version in MPSoC chip. The configuration parameters for the both PCIe hosts are absolutely the same.


Do you have any thoughts on this?

Kind regards,
Igor