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Part Number: TXS0108E
1) In my design, in the initial condition, there should be a minimum delay of 300uS between VCC HIGH and rising edge of RST#.
Can I use TXS0108e for level shifting 1.8V RESET# to 3.3V by adding a 51k pull down resistor at the output side?
There are three devices(2xNOR flash and 1xoneNAND) to which RST# is given. Will this work as expected? Should I use TXB0108 instead of TXS01008?
2) Also, I am using TXB0108 for level shifting 1.8V ADDRESS and DATA to 3.3V level. Will this be able to drive all the three devices?
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In reply to Emrys Maier:
Watch the Introduction to AXC Family
Read the app note on Power Sequencing for the AXC family
Evaluate the AXC8T245 EVM and watch the translation using the EVM
In reply to ShreyasRao:
Thanks for the reply.
What will be the output voltage of B1 port of TXS0108/TXB0108 if there is no input signal at A1 with both Vcca and Vccb enabled?
What I understood was, both sides of TXS0108 will be high by default.
I want to have a low value for RST# until the FPGA drives it high. 51k resistor was added by mistake, you can ignore that.
Please suggest an option for this.
Is there any push-pull device without direction control as replacement for TXB? If not, please suggest an alternate one with direction control.
In reply to Shanu V:
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