Hi,
My customer schematic is shown below.
The questions is if P3V3_AUX comes up first (before than P1V8_CPU0), SPI signal is HIGH, is there leakage current from B1/2 to A1/2?
This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Hi,
My customer schematic is shown below.
The questions is if P3V3_AUX comes up first (before than P1V8_CPU0), SPI signal is HIGH, is there leakage current from B1/2 to A1/2?
Hi Alan,
Thanks for reposting the schematic. The 200kohm resistor needs to be moved so that it is between P3V3_AUX and VREF_B, and VREF_B needs to be directly connected to EN for this part to properly translate. (see the datasheet, section 9.2.1)
With the current setup, you will see excessive current draw and possibly damage to the LSF0102.
Once you fix the configuration issue I mentioned above, if the B1/2 signals are ~3.3V, VREF_B is 3.3V, and VREF_A is 0V, then I would expect to see very little current leaking through the device (I would guess at 10uA max, probably closer to nA typically).
There's a great applications report that covers many common questions for this device - if you haven't seen it, it's worth a look.