This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

SN74AVC4T774: SN74AVC4T774

Part Number: SN74AVC4T774

For this level-shifter I will have A1 and A2 as an Input;  A3 and A4 as an Output.

When the power is stable on VCCA and VCCB, I would pull OE' low.  As a result,  A3 and A4 Output is Enabled, also, B1 and B2 Output is enabled, correct?

If the device was to remain on forever, the OE' input would only be pulled low one time after VCCA and VCCB is stable?  Correct?

Thanks,

Brian

  • Hello Brian,

    Yes, the device works by the function table in section 9.4 of the datasheet. If the OE is high, all outputs are high impedance.
    If the OE pin is low, the DIR pin selects which direction the data will flow. Either from A to B or B to A.

    I do understand the potential confusion from the data in Table 1, but the direction pin will determine the flow of data from A to B or B to A within the device.

    Hopefully that helps to answer your question.
    Best,
    Michael