ISO1540: Multinode isolation with ISO1540

Part Number: ISO1540

Dear All,

I am looking into the device ISO1540 to galvanically isolate the Master from the slaves.

My system has 4 boards each with micro-controller and they are identical in PCBs.

Board 1 acts as the bus master while other 3 boards are slaves at the bus. I want to isolate the master as well as the slaves galvanically from the I2C bus via a DC/DC converter.

I attach my design below. Is its possible to achieve this?

  

Thanks 

Sns22

  • Hi

    Yes, This is achievable.
    Please take care that you have right pull up resistors on SDA and SCL

    Regards
    Tejas
  • In reply to Tejas Hommaradi:

    Hi,

    Will there be a problem with connecting 2 devices in parallel with regards to rise time of the signals? Our aim is to prohibit formation of ground loop between the devices.

    Since I am at the end of my design phase I want to build the circuit without testing it in the final schematic.
    So I am a bit concerned if there could be timing issues?


    Cheers
    Sns22
  • In reply to sns22:

    Hi,

    Could you let me know how far these boards are placed to each other? Do these boards share common bus side ground? (GND2)

    Connecting 2 devices in parallel shouldn't be a problem if the pull up resistors are chosen to achieve the required rise time values.

    The bus side ground should be connected at a common point (forming a star type connection) to minimize the potential ground loops.

    Regards

    Tejas

  • In reply to Tejas Hommaradi:

    Hi,

    The boards are 50 cm far apart only. They do not share the common GND on the micro-controller side but will be connected to common GND on the bus side. Yes we will take care of the star connection on the PCB layout.

    In the I2C interface, we want to make sure that design is compliant with the timing requirements in I2C.
    Specifically, the propagation delays of the isolation channels as well as the propagation delay mismatches between isolation channels need to be considered to make sure the resultant interface meets I2C requirements. Can you comment if this design will have a significant impact on the delay?

    Cheers
    Sns.
  • In reply to sns22:

    Hi,

    The propogation delay should not be a concern in this design. I2C as a protocol puts limitation on max bus capacitance and rise times, system has to be designed to meet it. By the way what is the max data rate used in the system?

    Also just to understand more, do you expect a noisy environmt in the system and are all the four boards supplied from same main source (may be through different point of power tree but from same main source such as battery or SMPS)

    Regards
    Tejas
  • In reply to Tejas Hommaradi:

    Hi,

    We intent to use this setup as a slow control clocking @100kHz or max. 400kHz.

    Well, no our environment is not so noisy as we avoid ground loops throughout the system.
    Each of the board has its own power supply and GND. Although all the GNDs can be connected via Earth in future.

    I would also like to know what means in the datasheet

    The ISO1540 is suitable for multimaster applications. For applications where clock stretching by the slave is possible, the ISO1540 device should be used. What is clock stretching?

    Regards

    Sns

  • In reply to sns22:

    Hi,

    Usually Master handles the clocking in the system and slave sends out data or receive data (Bi-Directional communication) in response to the clock edges. Clock stretching is a mechanism used by slaves to indicate master that it is busy. For instance when master completes transmitting the data and if the slave is still processing the data or if the data requested from master is not ready, then slave holds SCL line low indicating its busy and master waits till slave releases the SCL line.

    For applications where clock stretching is required ISO1540 bi-directional I2C device must be used.

    Regards
    Tejas