ISO3088: Power Sequencing and shut down

Part Number: ISO3088


I will use the ISO3088 in our new design an I want to check first how it's look like with "power sequencing".

In my application VCC1 is 3.3V and VCC2 is 5V. I am making the 5V from 24V with an isolated DC-DC converter.

The 3.3V side is coming from my FPGA and the 5V is outside from our system.

Which supply should be apply first to the IC: VCC1 or VCC2? With which delay?

Can I also just supply the 3.3V (VCC1) without supplying the 5V side (VCC2) without any damage?

I am thinking to do this when I don't use the chip, or will you recommend to use it as an Input  when not use (DE low and /RE low)?

for example in this way I can use an internal register in my FPGA to ignore the input and connect DE and /RE together.

Many thanks for your feedback.

Best Regards,