Part Number: ISOW7841
Our customer measured VISO ripple voltage, 90mVpp, 85us @ 5Vin-5Vout, 2mAout (drive only ADS1248). It is not an issue nor out of sepc, understanding typ 100mVpp and figure 30 in d/s.
However they would like to improve less ripple voltage if possible. An idea is to add LC in the 2nd figure below. Do you think it is the right way or have another good way?
It would be very appreciated if there is good recommendation to improve Vpp.
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In reply to Koteshwar Rao:
Thank you very much for your quick response.
I am trying to calculate the right capacitor (and inductor) value for 10kHz cutoff frequency. It probably simply double 10uF.
But It would be very nice if you have some formula how 10kHz and 120kHz come from 10uF and 0.1uF.
My preliminary formula is Fc=1/(2 x pi x R x C)
Actually Murata's 10uF SMT ceramic capacitance value will change 6uF from 10uF at 5V bias as below graph shows. So larger ceramic will be expected.
And I applied capacitor's ESR for R. Do I need to consider the VISO impedance?
In reply to Masa Katayama:
There isn't a direct formula between decoupling capacitor & ripple frequency. For ISOW, the output ripple frequency depends on the load connected. For higher loads frequency is going to be closer to 120kHz and for lower loads frequency is going to be closer to 10kHz.
Since ISOW device characterization is majorly done at 10µF+0.1µF, I was referring to this capacitance as a test condition. Under this test condition, the output ripple frequency will be in an expected range of 10kHz to 120kHz based on load. For higher capacitance the frequency range can extend on the lower side to further lower values depending on the load.
For the pi filter, you can use the below formula to calculate cut-off frequency where the two cap values will be C/2 each and the inductor value would be L as shown in the image below.
Fc = 1 / [ pi x square-root (L x C) ]
Let me know if you have any other questions, thanks.
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