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I am looking for a solution to isolate a clock signal used by an ADC. As the sampling clock jitter affect a final ADC performance (SNR) I am looking for as minimum jitter introduced by the isolation barrier as possible. Are the digital isolators suitable for such application? Looking at the fastest TI devices, e.g. ISO721M they introduce jitter as much as 1ns (pk-pk) typical. Are there better performing parts in the TI portfolio? The jitter specification is shown in the documentation for a random data pattern and an NRZ pattern, the second is lower so am I right that for a clock signal it will be further improved?
if your clock is continuous, you could consider AC coupling to get through the barrier. A suitably rated transformer or capacitor will do the job, depending on your clock frequency.
You might want to filter the clock on the sending side to a more-or-less sine waveform and bias the output to the threshold of a comparator or line receiver with a logic output to match your ADC.
You'll need to choose the comparator/line receiver with a bit of care but you should be able to get below 1ns.
If the voltage across the barrier is AC you'll need to make sure the output circuit isn't sensitive to that frequency range, probably straightforward if your clock is a much higher frequency than the voltage across the barrier.
Sorry if you've already dismissed that approach as unsuitable....
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In reply to Robert Szumowicz:
Thanks for posting your question on our forums. [Alex, quick thank you for your responses as well!]
We do have devices with < 1ns jitter if that is still of interest. For example, the ISO7641FM can do 0.5ns. Please see Figure 14 below [taken from the datasheet] for more details. Do you have a particular value in mind as a spec target? [with the full understanding here being lower the better]
In reply to Abhi Aarey:
I hope this helps! I am tentatively marking this as "TI thinks resolved" for now, but please feel free to ask us further questions on this or on another topic- and we'll be here to help out.
PS: Thanks/credit to my colleagues Anant and Sreeram for the discussion on the 73XX and the TI Design referenced above.
In reply to Alex Ballantyne:
Thank you Alex. A jitter cleaner is surely another possibility but as it is going to be a multi channel instrument it would need to be replicated multiple times. Anyhow thanks fort your valuable thoughts, you try to approach a problem from different sides.
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