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ISO1176: About A,B,D pin status in logic side power supply = 0V condition

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Part Number: ISO1176


I use this device under the following conditions:
・Logic side power supply=3.3V
・Bus side power supply=5.0V

However, there are situations where the logic side power supply is not applied, such as during power supply startup.
In this case, is the correct understanding that the driver side is HiZ and the receiver side is HiZstatus?
・Logic side power supply=3.3V
・Bus side power supply=5.0V

Configuration is below.


If PLD Logic is turned off and PLD is turned off,
I am worried that indefinite data will be generated on the BUS side and Logic out put side.
And I am wary that Logic indeterminate output data will damage PLD.

Could you give me your advice?

Best Regards,

  • Hi Yusuke-san,

    The device function tables Table 1 & Table 2 in section 9.4 of ISO1176 datasheet list out various functional modes under various situation. This also cover the situation that you have described in your post.

    When VCC1 is un-powered, the bus outputs A & B and also R output will be in high impedance state as also described in the Function Tables. I hope that answers your question, thank you.

    Koteshwar Rao