Dear TI Team.
There is a problem with the output voltage since ISOW7841 design.
The spec used is as follows. (Only Power Line / Data lines are not used.)
Vin : 5V
Vout : 3.3V
Load : 20mA under
Issue : The problem is that output voltage is about 2V.
Can the Cap between VCC and Viso affect?
Can you review the circuit?