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Part Number: ISO1540
We have a FAN controller on side 1 and a FAN on side 2. We are experience an issue that “when Side B FAN is not connected the are experience clamping on side 1 to ~1 to 1.2V”. In other words, side A is limited to 0V and 1.2V levels. The pullup resistor for SDA2 is built into the fan so my suspicion is that the side 2 is settling to a voltage below the side 2 low threshold and that a low is being passed to side 1 when the fan is disconnected. However, if this were the case then side 1 should be “clamping” at 650mV to 800mV.
Looking at the specs of an analogous pin-to-pin part from another vendor, there spec implies that Side 1 voltage is limited to less than what side 2 voltage is. Is this true for a TI device. In other words, If SDA2 is sitting at 2V, would SDA1 be limited to 2V as well? I doubt this is the case, but please confirm.
Also, what may help me further debug this is a easier to understand explanation of Figure 26 in the ISO1540 datasheet. Specifically the right-side image (also pasted below). I’m confused as to what is causing Vol1 in the image. Please elaborate.
Thanks for using E2E. This is Abhi (from the ISO apps team) following up on Dan's email response on this. While we wait for our Apps expert for this part to respond to the first set of questions (likely on Monday), we thought we'll try to clarify the second part of your question (regarding Fig.26) to help in the debug.
To try and make Figure 26 easier to understand, I have put it next to Figure 25 as well as put section 8.4.2 below it. I've also reformatted this section and added some extra comments (purple font) and highlights. The key to the extra step in the SDA1 waveform on Fig 26(right side) is because it is not immediately noticeable since it is being actively overwritten by the master driving a low on the same pin externally at the same time (higher strength).
8.4.2 Transmit Direction (Right Diagram of Figure 26)
I hope this helps? If it doesn't, please let us know and we can do a follow-up.
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