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ADC Isolation part

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Replies: 37

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Hi TI Team,

I wanted to Isolate ADC input pins which is coming from external circuitry, Its a single pin ADC, where its voltage will be 0 to 12V max. but my SOC accepts only 1.8V levels of ADC data

So I need Isolation, voltage translation and then buffer.

Note(not looking for differential ADC input Isolators)

So please suggest me the parts for the above requirements.

Manjunath 

  • Hi Manjunath,

    Thank you for posting to E2E! If this is the only signal to be isolated, a one-channel device like the ISO7710 can be used here. This is a 2.25 to 5.5V part, so the 12V input signal will need to be reduced for compatibility with the isolator.

    Regarding the 1.8V output, ISO7021 or ISO7041 support 1.8V, so even though the input signal would still need to be regulated, if the isolated side (Vcc2) is powered by 1.8V, the output signal level will be compatible with the 1.8V ADC input.

    TI's digital isolators are designed with output buffers, so an external one is not necessary between the isolator and ADC. The system would be something like the block diagram below:


    Please do let us know if the ISO7021 can be used (with the unused channel configured correctly). What is the datarate of this signal to be isolated?


    Thank you for your time,
    Manuel Chavez

  • In reply to Manuel Chavez:

    Hi Manuel,

    Thanks for the reply,

    How to regulate the ADC level from 12 to 1.8?

  • In reply to Manjunath G14:

    Hi Manjunath,

    No problem! My apologies for not clarifying sooner, but is the signal to be isolated a digital or analog signal? The previous recommendation I made was to isolate a digital signal with LOW = 0V and HIGH = 12V, like a RESET, CS, or data line.

    If the 0V - 12V signal is an analog signal, the solution above will be insufficient to isolate the signal for input to an ADC. In this case, the analog signal requires isolation, but that is not a robust approach for signal integrity or cost.

    A potential alternative is to isolate the data lines out of the ADC (SPI, LVDS, I2C, lines) instead of the analog input signal. Is this possible in your system or is this the original idea?


    I apologize for the confusion.


    Have a great weekend,
    Manuel Chavez

  • In reply to Manuel Chavez:

    Hi manuel,I have asked for only ADC isolation, but actually Im also looking for 0-12v digital input isolation also. Now i understood that Can't provide 1.We can't provide Isolation for a 12v ADC INPUT lines, and instead of that First convert the incoming adc lines to any serial data kines and then isolate it, is this your recommendation right? 2. If my ADC lines are with 0- 5v, in this.how can i provide isolation for these analog lines? Once again pleass explain. 3.for any digital lines high as 12v and low as 0V, or high as 5V amd low as 0V, For these digitals, pleass provide me ths isolation procedures. Note:my main MCUacceptsonly 1.8 voltage levels. 4. If my digital input line is a 12V, then first i need to regulate it to lower voltage right(like 5v or 3.3v), Then i should isolate it? after that voltage translation is done? Please explain, your support will help me more here. Thanks Manjunath
  • In reply to Manjunath G14:

    And also we require 2 digital output pins, with a signal of 5V,

    But my MCU out will be 1.8V.

    What is the isolation you will suggest ua here,?

  • In reply to Manjunath G14:

    Hi Manuel,

    I have updated the design, Please find it in the attached file.

    GPIO's.pdf

    For GPIO

    Total 2 Digital input with 12V inputs and One Digital output with 5V output level.

    1. Whether the design is sufficient?

    2. 12V supply is Isolated but the 5V supply is Isolated as shown in the circuit, and shorted the Isolated and External GND(12V supply GND) together, will this work?

    3. Or 12V also should be isolated?

    Please suggest.

    For ADC

    You please suggest

  • In reply to Manjunath G14:

    [Same answer in the logic forum.]

    The R34/R35 voltage divider does not generate a valid logic level. To set the B→A direction, drop R34; but you can connect DIR directly to GND.

    Unidirectional downtranslation can be done with a buffer with overvoltage-tolerant inputs; you can replace U21 with a SN74LVC2G17-Q1.

    CMOS inputs must not float; ground pins C and D of U22.

    These three level shifters do not support isolated power supplies and require a common ground on both sides. And when you do connect all the grounds together, isolating the power supplies is pointless. If you do require isolation, then you must also isolate the three signals with a real isolator like the ISO7731-Q1. (It cannot go below 2.5 V or above 5 V, so you still need the level shifters.)

  • In reply to Clemens Ladisch:

    Hi Clemens Ladisch,

    Please find the attached updated design.

    8585.GPIO's.pdf

    1. The R34/R35 voltage divider does not generate a valid logic level. To set the B→A direction, drop R34; but you can connect DIR directly to GND.

    Manjunath : Noted.

     2. Unidirectional downtranslation can be done with a buffer with overvoltage-tolerant inputs; you can replace U21 with a SN74LVC2G17-Q1.

    Manjunath : "SN74LVC2G17-Q1" doesn't do voltage translation from 5V to 1.8V.

    3. CMOS inputs must not float; ground pins C and D of U22.

    Manjunath : Thanks Noted.

    4. We are currently looking for Digital Isolators for our apllications.

    i. We need to isolate 2 Digital inputs whose digital lines voltage will be 12V

    ii. and One Digital output whose voltage levels is 5V

    iii. Main MCU accepts only 1.8V level.

    So, for Digital inputs, Considering from Outside world, first I need to regulate the 12V levels to 5V levels and then I need to Isolate it and then again should do the voltage translation to 1.8V. I'm I right here?

    For Digital Output, I need a Isolation and then Voltage translator to 1.8V.

    Please check the attached schematic and review the same.

    Manjunath

  • In reply to Manjunath G14:

    When you run the SN74LVC2G17-Q1 with VCC = 1.8 V, it accepts 5 V signals at its inputs (see VI in the Recommended Operating Conditions table), and outputs 1.8 V signals.

    Your isolation architecture is basically correct. However, the INx pins are for signals going into the ISO chip, and the OUTx pins, for signals going out of it; you have to exchange them. (And the ISO7731-Q1 would be cheaper than the ISO7742-Q1.)

  • In reply to Clemens Ladisch:

    Thanks for the reply,

    1. I have updated SN74LVC2G17-Q1 in the design(Assuming output levels will be equal to VCC and Input lines can handle a voltage upto 5.5V regardess of the VCC voltage).

    I have also updated the directions of ISO7742-Q1

    GPIO's_1.pdf

    2. Regarding the ISO7731-Q1, This has 3 channels and in that 2 are forward direction and 1 in reverse direction. But We require 2 in Reverse direction(Digital Output lines) and 1 in forward direction(1 Digital output line).

    Hence I have choosen ISO7742-Q1.

    Please suggest

    Manjunath 

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