ISO7310C: ISO7310C

Hi Peter,

Thank you for posting to E2E!

IBIS models are used to model digital isolators since most simulation tools cannot model isolation performance on different GND potentials.

IBIS models are accurate for I/O simulation, and although IBIS models can be imported as macros in the full version of TINA, IBIS models cannot be imported into TINA-TI. The .txt file attached still looks like an accurate IBIS model with the different extension, so you may be able to run a simulation with this model (or the original IBIS model) in a signal integrity simulation tool such as HyperLynx, or import the IBIS model into HSpice.


Thank you for your time,
Manuel Chavez

Hi Peter,

Of course! Digital isolators behave essentially like buffers, so using a gate and factoring in impedances should yield a usable model for your case :)

I apologize for the inconvenience due to the lack of a model, but let us know if there is another way we can help in your analysis! Please also consider using the ISO7710 in your setup instead of ISO7310C. IISO7710is a newer isolator with improved isolation performance which can replace ISO7310C in the majority of applications.


Thank you,
Manuel Chavez

Hi Manuel,

Yes - the method I have used is working well to simulate the Output of the ISO chip.

Thanks for suggesting the 7710 - it looks superior in many respects to the 7310C. But there is a couple of things - the minimum threshold for a high is only 0.7 x Vcc = 3.5V compared to 2V for the 7310C. This is bad for me - the input is fed from 1.5m length of 50 ohm coax that is not terminated properly - i.e. 50ohm source and 50 ohm load. I had to use a source of 10 ohm and load of 100 ohm to prevent the signal from dropping too low plus there is a momentary dip due to the mismatch. The dip sits above 2V comfortably with the 7310C BUT it would be dangerously close to the 3.5V threshold in the 7710. Why the discrepancy in thresholds?

Also the quiescent current for the second section is very low @ 600uA compared to 1.2mA for the 7310. This is great because I want absolute minimum current for Icc2 because that part is floating and driven by a 9V battery through a micropower 5V reg.

But, the weird thing is the ratio of Icc1:Icc2 - for the 7310C it is 0.2:1.2mA but for the 7710 it is 0.5:0.6mA. The current ratios for the 1st and 2nd sections are so different - why is that? Is it a misprint in the datasheet for the 7710?

Thanks for your help.

Best regards,

Peter

Hi Peter,

My apologies for the delayed response. The difference in input HIGH/LOW thresholds between ISO7310C and ISO7710 come from their difference in input structure: ISO7310C has a TTL input structure, which means its input HIGH/LOW thresholds remain constant throughout the operating Vcc range. ISO7710 features CMOS inputs, which means input HIGH/LOW levels scale as a percentage of Vcc (LOW <= 30% of Vcc, HIGH >= 70% Vcc).

Is it possible to adjust the source voltage / impedance or the load impedance of this system?

Another difference between older TI isolation devices, like the ISO7310C, and newer devices like ISO7710 and ISO7810, is their internal architecture for transmitting signals across the isolation barrier: current ratio is correct for both devices.


Thank you,
Manuel Chavez

Hi Manuel,

That's OK, I appreciate any help you can give. The OR gate output is about 4V under load. If I raise the load impedance and decrease the source impedance I will certainly get above 3V but it will still be a tight margin - I hate designing so close to the limits! :-) Once you start lowering source and increasing load impedance, even for short lengths of coax at high frequencies, there is ringing on the edges (in this case). But it is going into the input of the ISO so ringing doesn't matter, except that it does not go below the lower threshold.

I will have to try modifying the impedances and see. Worst case I will have to use the 7310C and just put up with the increased load current! I have calculated that a 9V alkaline battery will give ~ 300hrs at 2mA current drain, which is well above the quiescent current of the 7310C so if I have to I will go that way.

On another note, did you see my next question? No one has replied yet. But it is weird that input current increases dramatically when the output goes into clipping. Fet input opamps virtually have extremely low input currents - appearing as a small capacitance but that is only when the output is not clipping. You can check my attached circuit. In an overload condition the input is protected with two clippers and when they cut in the input is well below +/-5V according to data sheet, however the Vin current is well over +/-10mA - hence device destruction!! My original test in the circuit attached has the input frequency set to 50MHz (I think). Since then I have tried driving under the same conditions with a much lower frequency of1MHz and now the current is much less but still significant.

I am wondering if it's related not only to clipping but also BW limitations? In both cases the input is a squarewave with sharp edges, I will have to try driving it with a sinewave, however the clipping circuits will still tend to create harmonics so not sure.

If you could peruse and run the original circuit I attached and let me know your thoughts would be appreciated.

I have been playing around with opamps for years and have never seen this problem surface and BTW there is NOTHING on the net about it!

Am I missing something here??

Thanks for your help.

Best regards,

Peter

Hi Peter,

I understand the trade-offs here. If this is the case, and ISO7310C meets the margin you are comfortable with, then I agree it is the appropriate solution to choose :)

It may be necessary to create new posts for each question you have regarding the gate or op amp in use. Since I support Isolation devices, I typically do not see new posts involving other products, but if you link them down below I'm happy to take a look.

Have you shared a schematic for this additional question? It will be insightful along with screenshots of waveforms you've captured/simulated.


Have a great weekend,
Manuel Chavez

Hi Manuel,

Thanks again for your reply. Regarding the ISO chips; I was able to change the source/load impedance's and ended up with about 4V pk on the input. However then I noticed that the jitter on the ISO7710's output is virtually an order of magnitude worse than that of the ISO7310C so I think I will use it.

OPA818.docxOPA818-2overload1.TSC I've had trouble before trying to put circuit diagrams and waveforms in this platform so I'm going to attach it as a word file. Also I will attach the circuit.

Hope you are able to look into this.

Trust your weekend has been great!

Best regards,

Peter

Hi Peter,

No problem! I understand and agree the ISO7310C might be the better solution out of the two isolators in this case.

Regarding the OPA818 schematic and simulations, thank you for including the detailed report. From my perspective, it does seem there is a misalignment between the simulation model and datasheet, but this could be dependent on configuration of external components, and my expertise is limited regarding specific knowledge of this device and its sim model.

May I create a new E2E thread using sections of the document you just attached?


Thank you,
Manuel Chavez

Hi Manuel,

Be my guest!!

Yes of course! Thanks for answering this one.

I can nearly assure you that the results are indicative of a sim/datasheet mismatch. Although the schematic looks complex the only critical external components in reality are the two gain setting resistors!

The limiters were disconnected in the last sim and you have the simulated transmission line on the output which has virtually no effect on the problem I'm encountering.

I've had to employ extensive measurement tools and limiters on input and output to try and figure out why the circuit was so misbehaving!

I think it is important that whoever deigned this model to be involved in this.

It is important for me to get this right because as indicated previously, this amp will be used to amplify voltages around 3mV to a max of 350mV for a linear output but the same circuit can encounter up to 35V!!

So I don't want to have to make the protection 'tighter' than it needs to be because I don't want any distortion on my signal envelope.

If you could give me a direct link to the Thread in question would be great!

Thanks again for all your help.

Best regards,

Peter

Hi Peter,

You're welcome!

I've continued this conversation on the thread linked here:



Please join the conversation and add any details or questions you'd like considered. Since the ISO7310C question has been answered, this thread will be closed meanwhile.

Let us know if there is anything else we can assist you with in the future!


Thank you for choosing TI,
Manuel Chavez