Part Number: ISO1500
When RE and DE are switched at the same time, the R waveform goes low for a moment.
I have found in E2E that this phenomenon also occurs in some other devices.
If DE is set to Low and RE is set to Low after 1us, this problem does not occur.Why does this happen?
What is the minimum delay required?
Is there a way to switch between DE and RE at the same timing so that this problem does not occur?
A delay of at least 200ns between DE and RE will be required to avoid this glitch. Section 6.13 and 6.14 of the datasheet show the enable times of the Driver and Receiver respectability. The Driver enable time is typically 200ns.
Faster devices such as the ISO1430 or ISO1450 have lower enable times and would not require as much delay. However, these devices come in the larger SOIC (DW) rather the the SSOP (DBQ) package of the ISO1500.
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In reply to Lucas Schulte9:
Is it possible to provide waveforms of the issue you are observing? A scopeshot with RE, DE, R, and D would be good. Additionally, are you able to provide a schematic of the RS-485 solution?
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